STM32F469xx
Arm
®
Cortex
®
-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/384+4KB RAM, USB OTG HS/FS,
Ethernet, FMC, dual Quad-SPI, Graphical accelerator, Camera IF, LCD-TFT & MIPI DSI
Datasheet
-
production data
Features
Core: Arm
®
32-bit Cortex
®
-M4 CPU with FPU,
adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 180 MHz,
MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone
2.1), and DSP instructions
Memories
– Up to 2 MB of Flash memory organized into
two banks allowing read-while-write
– Up to 384+4 KB of SRAM including 64 KB of
CCM (core coupled memory) data RAM
– Flexible external memory controller with up
to 32-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR, SDRAM, Flash
NOR/NAND memories
– Dual-flash mode Quad-SPI interface
Graphics
– Chrom-ART Accelerator™ (DMA2D),
graphical hardware accelerator enabling
enhanced graphical user interface with
minimum CPU load
– LCD parallel interface, 8080/6800 modes
– LCD TFT controller supporting up to XGA
resolution
– MIPI
®
DSI host controller supporting up to
720p 30 Hz resolution
Clock, reset and supply management
– 1.7 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC
(1% accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
Low power
– Sleep, Stop and Standby modes
– V
BAT
supply for RTC, 20×32 bit backup
registers + optional 4 KB backup SRAM
3× 12-bit, 2.4 MSPS ADC: up to 24 channels and
7.2 MSPS in triple interleaved mode
2× 12-bit D/A converters
General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
Up to 17 timers: up to twelve 16-bit and two
32-bit timers up to 180 MHz, each with up to four
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input. 2x watchdogs and
SysTick timer
LQFP100 (14 × 14 mm)
LQFP144 (20 × 20 mm)
LQFP176 (24 × 24 mm)
UFBGA169 (7 × 7 mm)
WLCSP168
UFBGA176 (10 x 10 mm)
TFBGA216 (13 x 13 mm)
LQFP208 (28 × 28 mm)
Debug mode
– SWD and JTAG interfaces
– Cortex
®
-M4 Trace Macrocell™
Up to 161 I/O ports with interrupt capability
– Up to 157 fast I/Os up to 90 MHz
– Up to 159 5 V-tolerant I/Os
Up to 21 communication interfaces
– Up to three I
2
C interfaces (SMBus/PMBus)
– Up to four USARTs and four UARTs
(11.25 Mbit/s, ISO7816 interface, LIN, IrDA,
modem control)
– Up to six SPIs (45 Mbits/s), two with muxed
full-duplex I
2
S for audio class accuracy via
internal audio PLL or external clock
– 1x SAI (serial audio interface)
– 2× CAN (2.0B Active)
– SDIO interface
Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
– Dedicated USB power rail enabling on-chip
PHYs operation throughout the entire MCU
power supply range
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
8- to 14-bit parallel camera interface up to
54 Mbytes/s
True random number generator
CRC calculation unit
RTC: subsecond accuracy, hardware calendar
96-bit unique ID
Table 1. Device summary
Reference
Part numbers
STM32F469AE, STM32F469AG, STM32F469AI
STM32F469BE, STM32F469BG, STM32F469BI
STM32F469IE, STM32F469IG, STM32F469II
STM32F469xx
STM32F469NE, STM32F469NG, STM32F469NI
STM32F469VE, STM32469VG, STM32469VI
STM32F469ZE, STM32469ZG, STM32469ZI
May 2021
This is information on a product in full production.
DS11189 Rev 7
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www.st.com
Contents
STM32F469xx
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.1
Compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.1.1
1.1.2
1.1.3
1.1.4
LQFP176 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
LQFP208 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
UFBGA176 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TFBGA216 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
2.18
2.19
Arm
®
Cortex
®
-M4 with FPU and embedded Flash and SRAM . . . . . . . . 21
Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 21
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 22
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Flexible memory controller (FMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Quad-SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 25
LCD-TFT controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
DSI Host (DSIHOST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Chrom-ART Accelerator™ (DMA2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 27
External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 27
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.19.1
2.19.2
Internal reset ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Internal reset OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.20
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.20.1
2.20.2
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Contents
Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 35
2.21
2.22
2.23
2.24
Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 35
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
V
BAT
operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.24.1
2.24.2
2.24.3
2.24.4
2.24.5
2.24.6
Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 38
General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
2.25
2.26
2.27
2.28
2.29
2.30
2.31
2.32
2.33
2.34
2.35
2.36
2.37
2.38
2.39
2.40
2.41
2.42
2.43
2.44
Inter-integrated circuit interface (I
2
C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Universal synchronous/asynchronous receiver transmitters (USART) . . 40
Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Inter-integrated sound (I
2
S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Serial Audio interface (SAI1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Audio and LCD PLL(PLLSAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Secure digital input/output interface (SDIO) . . . . . . . . . . . . . . . . . . . . . . . 42
Ethernet MAC interface with dedicated DMA and IEEE 1588 support . . . 43
Controller area network (bxCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 44
Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 44
Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
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4
5
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.1.7
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
5.2
5.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.3.10
5.3.11
5.3.12
5.3.13
5.3.14
5.3.15
5.3.16
5.3.17
5.3.18
5.3.19
5.3.20
5.3.21
5.3.22
5.3.23
5.3.24
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
VCAP1/VCAP2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Operating conditions at power-up / power-down (regulator ON) . . . . . . 96
Operating conditions at power-up / power-down (regulator OFF) . . . . . 96
Reset and power control block characteristics . . . . . . . . . . . . . . . . . . . 96
Over-drive switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . 114
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 119
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
PLL spread spectrum clock generation (SSCG) characteristics . . . . . 123
MIPI D-PHY characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
MIPI D-PHY PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
MIPI D-PHY regulator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 128
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 132
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
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5.3.25
5.3.26
5.3.27
5.3.28
5.3.29
5.3.30
5.3.31
5.3.32
5.3.33
5.3.34
Contents
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
V
BAT
monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
FMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Quad-SPI interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 186
LCD-TFT controller (LTDC) characteristics . . . . . . . . . . . . . . . . . . . . . 187
SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 189
RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
LQFP100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
LQFP144 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
WLCSP168 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
UFBGA169 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
LQFP176 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
UFBGA(176+25) package information . . . . . . . . . . . . . . . . . . . . . . . . . . 207
LQFP208 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
TFBGA216 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
7
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
Appendix A Recommendations when using internal reset OFF . . . . . . . . . . . 217
A.1
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
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Analog electronics
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