CY37256P208-125NC datasheet, PDF

Datasheet> All Categories > CY37256P208-125NC

Preview

CY37256P208-125NC: Description5V, 3.3V, ISR™ High-Performance CPLDs; File Size2MB，62 Pages; ManufacturerCypress Semiconductor

Download Datasheet View All

CY37256P208-125NC Overview

5V, 3.3V, ISR™ High-Performance CPLDs

Preview

Download Datasheet

View All

Ultra37000 CPLD Family

5V, 3.3V, ISR™ High-Performance CPLDs

Features

• In-System Reprogrammable™ (ISR™) CMOS CPLDs

— JTAG interface for reconfigurability

— Design changes do not cause pinout changes

— Design changes do not cause timing changes

• High density

— 32 to 512 macrocells

— 32 to 264 I/O pins

— Five dedicated inputs including four clock pins

• Simple timing model

— No fanout delays

— No expander delays

— No dedicated vs. I/O pin delays

— No additional delay through PIM

— No penalty for using full 16 product terms

•

— No delay for steering or sharing product terms

3.3V and 5V versions

PCI-compatible

[1]

Programmable bus-hold capabilities on all I/Os

Intelligent product term allocator provides:

— 0 to 16 product terms to any macrocell

— Product term steering on an individual basis

— Product term sharing among local macrocells

• Flexible clocking

— Four synchronous clocks per device

— Product term clocking

— Clock polarity control per logic block

• Consistent package/pinout offering across all densities

— Simplifies design migration

— Same pinout for 3.3V and 5.0V devices

• Packages

— 44 to 400 leads in PLCC, CLCC, PQFP, TQFP, CQFP,

BGA, and Fine-Pitch BGA packages

General Description

The Ultra37000™ family of CMOS CPLDs provides a range of

high-density programmable logic solutions with unparalleled

system performance. The Ultra37000 family is designed to

bring the flexibility, ease of use, and performance of the 22V10

to high-density CPLDs. The architecture is based on a number

of logic blocks that are connected by a Programmable Inter-

connect Matrix (PIM). Each logic block features its own

product term array, product term allocator, and 16 macrocells.

The PIM distributes signals from the logic block outputs and all

input pins to the logic block inputs.

All of the Ultra37000 devices are electrically erasable and In-

System Reprogrammable (ISR), which simplifies both design

and manufacturing flows, thereby reducing costs. The ISR

feature provides the ability to reconfigure the devices without

having design changes cause pinout or timing changes. The

Cypress ISR function is implemented through a JTAG-

compliant serial interface. Data is shifted in and out through

the TDI and TDO pins, respectively. Because of the superior

routability and simple timing model of the Ultra37000 devices,

ISR allows users to change existing logic designs while simul-

taneously fixing pinout assignments and maintaining system

performance.

The entire family features JTAG for ISR and boundary scan,

and is compatible with the PCI Local Bus specification,

meeting the electrical and timing requirements. The

Ultra37000 family features user programmable bus-hold

capabilities on all I/Os.

Ultra37000 5.0V Devices

The Ultra37000 devices operate with a 5V supply and can

support 5V or 3.3V I/O levels. V

CCO

connections provide the

capability of interfacing to either a 5V or 3.3V bus. By

connecting the V

CCO

pins to 5V the user insures 5V TTL levels

on the outputs. If V

CCO

is connected to 3.3V the output levels

meet 3.3V JEDEC standard CMOS levels and are 5V tolerant.

These devices require 5V ISR programming.

Ultra37000V 3.3V Devices

Devices operating with a 3.3V supply require 3.3V on all V

CCO

pins, reducing the device’s power consumption. These

devices support 3.3V JEDEC standard CMOS output levels,

and are 5V-tolerant. These devices allow 3.3V ISR

programming.

Note:

1. Due to the 5V-tolerant nature of 3.3V device I/Os, the I/Os are not clamped to V

, PCI V

= 2V.

Cypress Semiconductor Corporation

Document #: 38-03007 Rev. *C

•

3901 North First Street

•

San Jose

CA 95134

•

408-943-2600

Revised July 7, 2003

Recommended Resources

A very creative voice-activated light circuit diagram to prevent false triggering

M58481P (TV and audio equipment) 30-function infrared remote control receiving circuit

STK4111II audio IC circuit diagram

Timer circuit diagram

TBA820M power amplifier circuit

Color TV remote control 41

【RT-Thread Reading Notes】Reflections on RT-Thread Learning Chapter 6: In Chapter 9, the function rt_list_entry() is defined at the beginning of the file scheduler.c. Isn't it inappropriate because it is referenced in the file clock.c?...; 天命风流 Real-time operating system RTOS

Nobel Prize winner: Computers will be able to simulate the human brain by 2030 and close to it by 2050: The second keynote speech of the 2008 Nobel Prize winners Beijing Forum was held in the Great Hall of the People yesterday. George Smoot, the 2006 Nobel Prize winner in Physics, predicted that by 2050...; liumnqti Industrial Control Electronics

The first demo hardware of stm32f200 is expected to be ready today.: But you may need to ask ST for some reference designs.The schematic diagram of this evaluation hardware can be made public, just because there is a handheld platform in the original Versaloon project ...; gary_81 stm32/stm8

I would like to ask how to adjust the speed of a brushless motor: [i=s]This post was last edited by jiaboyu on 2018-6-2 22:22[/i] [color=#001000][backcolor=transparent] I have a 2040 brushless motor and want to turn it into a small electric drill. I am going to buy ...; jiaboyu Motor Drive Control（Motor Control）

【Uncle T's Library】Thomas Calculus: [p=24, null, left][color=rgb(86, 86, 86)][backcolor=rgb(237, 235, 235)][font=微软雅黑][size=14px][url=https://download.eeworld.com.cn/detail/tyw/561655][color=#0066cc]《Thomas Calculus (10th Edition)》[/col...; tyw Download Centre

Did I read it wrong or did I write it wrong?: PDF in the TI link on the forum (Selection Guide: TI ARM Technology-Based Processors) Page 3: Did you know? The Sitara ARM Cortex-A8 microprocessor (MPU) is the industry's highest-performance single-c...; 蓝雨夜 Microcontroller MCU

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components