5.0 mm x 3.2 mm Package Pinout ............................................................................................................................................... 1
Ordering Information .................................................................................................................................................................... 2
Device Configurations and Pin-outs ............................................................................................................................................. 9
Pin-out Top Views................................................................................................................................................................. 9
Test Circuit Diagrams for LVCMOS and Clipped Sinewave Outputs ......................................................................................... 10
Frequency Stability ............................................................................................................................................................. 16
Output Frequency and Format............................................................................................................................................ 16
Output Frequency Tuning ................................................................................................................................................... 16
Pin 1 Configuration (OE, VC, or NC) .................................................................................................................................. 17
Control Voltage Bandwidth ................................................................................................................................................. 20
Pull Range and Average Pull Range .................................................................................................................................. 22
Output Frequency ............................................................................................................................................................... 23
2
I C Control Registers .......................................................................................................................................................... 25
Serial Interface Configuration Description .......................................................................................................................... 28
Serial Signal Format ........................................................................................................................................................... 28
Parallel Signal Format ........................................................................................................................................................ 29
Parallel Data Format ........................................................................................................................................................... 29
2
I C Timing Specification ...................................................................................................................................................... 31
2
I C Device Address Modes ................................................................................................................................................. 32
Schematic Example ............................................................................................................................................................ 33
Dimensions and Patterns ........................................................................................................................................................... 34
Additional Information ................................................................................................................................................................ 36
Revision History ......................................................................................................................................................................... 37
Rev 1.05
Page 3 of 38
www.sitime.com
SiT5156
1 MHz to 60 MHz, ±0.5 to ±2.5 ppm, Elite Platform™ Super-TCXO
Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and 3.3V Vdd.
Table 1. Output Characteristics
Parameters
Nominal Output Frequency Range
Operating Temperature Range
Symbol
F_nom
T_use
Min.
1
-20
-40
-40
Frequency Stability over
Temperature
Initial Tolerance
Supply Voltage Sensitivity
F_stab
–
–
–
F_init
F_Vdd
–
–
–
–
Output Load Sensitivity
F_load
–
–
–
Frequency vs. Temperature Slope
ΔF/ΔT
–
–
–
Dynamic Frequency Change during
Temperature Ramp
One-Year Aging
20-Year Aging
F_dynamic
–
–
–
F_1y
F_20y
–
–
Typ.
–
–
–
–
–
–
–
–
±7.10
±11.83
±28.40
±0.81
±1.35
±3.24
±15
±25
±60
±0.13
±0.21
±0.50
±1
±2
Max.
60
+70
+85
+105
±0.5
±1.0
±2.5
±1
±16.25
±32.50
±65.0
±2.75
±5.50
±11.00
±25
±50
±100
±0.21
±0.42
±0.83
–
–
Unit
MHz
°C
°C
°C
ppm
ppm
ppm
ppm
ppb
ppb
ppb
ppb
ppb
ppb
ppb/°C
ppb/°C
ppb/°C
ppb/s
ppb/s
ppb/s
ppm
ppm
Initial frequency at 25°C at 48 hours after 2 reflows
When using 430 to generate SPWM, the output will be detected by a logic analyzer and several pulses will be lost or deformed. Please help me solve the waveform diagram: The program is as follows: #inc...
1. Overview It has synchronous serial port mode (SPI) and asynchronous communication mode (UART). [/color][/size][/font][/p][p=19, null, left][font=Verdana, Geneva, Arial, Helvetica, sans-serif][size=...
I want to change the text of the column header of the list box. The code is as follows: LVCOLUMN lvColumn; lvColumn.mask = LVCF_TEXT | LVCF_WIDTH; pMethodManageDlg->m_MethodList.GetColumn(1, &lvColumn...
Today's portable medical devices allow patients to diagnose and treat themselves, move around freely, and even use the devices when they are out and about. To achieve the "easy to carry" feature, po...[Details]
The overcurrent and overheating coordinated protection technology implemented by polymer positive temperature coefficient devices (PPTC) can protect motors, controllers and electronic components in...[Details]
Demand Analysis
In an era of rapid information development, the process of electronicization of the financial system has also been greatly accelerated. As a platform that provides services 24 ...[Details]
1. Basic circuit characteristics of power amplifier
The basic circuit of the complementary symmetrical OTL power amplifier is shown in Figure ①. Among them: C1 is the signal input coupling ele...[Details]
Automatic target recognition (ATR) algorithms usually include algorithms for automatically detecting, tracking, identifying, and selecting attack points for targets. The complexity of the battlefi...[Details]
Abstract:
Aiming at the problems of repeated design and high cost of existing LED large-screen displays, a modular LED large-screen display is proposed, which can realize flexible configurati...[Details]
I hope my mobile phone has more functions, I hope my digital camera is smaller, I hope my Walkman can listen longer... Consumers are always full of expectations for the performance of portable electro...[Details]
Abstract:
A single pulse secondary radar reply processor implemented with EPLD. Its main functions include: reply frame pulse detection, reply information decoding, assembling reply inf...[Details]
1 Introduction
In recent years, with the rapid growth of mobile phones and MP4 video players, it is estimated that the production of mobile phones this year will reach 1 billion units, and...[Details]
With the rapid development of industrialization and urbanization, people's living environment is facing severe challenges due to the environmental damage caused by life and production. As an enviro...[Details]
On July 1 this year, the "Civil Airport Management Regulations" will be officially implemented. The new regulations put forward higher requirements for the safe operation of airports. At the same t...[Details]
1) What product is Xilinx announcing today?
Introducing the latest version of the industry-leading FPGA design environment, ISE? Design Suite 11.1, which provides the main part of the prog...[Details]
ISE Design Suite 11.1 sets a new industry standard in providing FPGA design tools and IP products for embedded, DSP and logic designers. As an important milestone in Xilinx's target design platform...[Details]
Set-top boxes often have some faults during the use process. This is a problem commonly reported by users. Due to the lack of professional knowledge and skills, users are often at a loss when probl...[Details]
Microcontroller MCU
京公网安备 11010802033920号
EEWORLD
