Obsolete Device
TC911A/TC911B
Monolithic Auto-Zeroed Operational Amplifiers
Features
• First Monolithic Chopper-Stabilized Amplifier with
On-Chip Nulling Capacitors
• Low Offset Voltage: 5μV
• Low Offset Voltage Drift: 0.05µV/°C
• Low Supply Current: 350μA
• High Common-Mode Rejection: 116dB
• Single Supply Operation: 4.5V to 16V
• High Slew Rate: 2.5V/μsec
• Wide Bandwidth: 1.5MHz
• High Open-Loop Voltage Gain: 120dB
• Low Input Noise Voltage: 0.65μV
P-P
(0.1Hz to 1Hz)
• Pin Compatible With ICL7650
• Lower System Parts Count
Package Type
8-Pin PDIP
NC 1
- Input 2
+ Input 3
V
SS
4
8 NC
TC911ACPA
TC911BCPA
7 V
DD
6 Output
5 NC
8-Pin SOIC
NC 1
- Input 2
+ Input 3
V
SS
4
TC911ACOA
TC911BCOA
8 NC
7 V
DD
6 Output
5 NC
Applications
•
•
•
•
•
Instrumentation
Portable/Battery Powered
Embedded Control
Temperature Sensor Amplifier
Strain Gage Amplifier
NC = No Internal Connection
Device Selection Table
Part
Number
Package
Temperature Offset
Range
Voltage
15μV
15μV
30μV
30μV
0°C to +70°C
0°C to +70°C
TC911ACOA 8-Pin SOIC 0°C to +70°C
TC911ACPA 8-Pin PDIP
TC911BCPA 8-Pin PDIP
TC911BCOA 8-Pin SOIC 0°C to +70°C
©
2005 Microchip Technology Inc.
DS21481C-page 1
TC911A/TC911B
General Description
The TC911 CMOS auto-zeroed operational amplifier is
the first complete monolithic chopper stabilized ampli-
fier. Chopper operational amplifiers like the ICL7650/
7652 and LTC1052 require user supplied, external off-
set compensation storage capacitors.
External capac-
itors are not required with the TC911.
Just as easy
to use as the conventional OP07 type amplifier, the
TC911 significantly reduces offset voltage errors.
Pinout matches the OP07/741/7650 8-pin mini-DIP
configuration.
Several system benefits arise by eliminating the exter-
nal chopper capacitors: lower system parts count,
reduced assembly time and cost, greater system reli-
ability, reduced PC board layout effort and greater
board area utilization. Space savings can be significant
in multiple amplifier designs.
Electrical specifications include 15μV maximum offset
voltage and 0.15μV/°C maximum offset voltage tem-
perature co-efficient. Offset voltage error is five times
lower than the premium OP07E bipolar device. The
TC911 improves offset drift performance by eight
times.
The TC911 operates from dual or single power sup-
plies. Supply current is typically 350μA. Single 4.5V to
16V supply operation is possible, making single 9V bat-
tery operation possible. The TC911 is available in 2
package types: 8-pin plastic DIP and SOIC.
Functional Block Diagram
V
DD
4
V
OS
V
SS
7
Correction Amplifier
-Input
2
+
–
A
*
B
Internal Oscillator
(F
OSC
200HZ)
B
*
A
+Input
3
+
+
–
Main Amplifier
Low Impedance
Output Buffer
6
Output
–
TC911A
TC911B
Note:
Internal capacitors. No external capacitors required.
DS21481C-page 2
©
2005 Microchip Technology Inc.
TC911A/TC911B
1.0
ELECTRICAL
CHARACTERISTICS
*Stresses above those listed under "Absolute Maxi-
mum Ratings" may cause permanent damage to the
device. These are stress ratings only and functional
operation of the device at these or any other conditions
above those indicated in the operation sections of the
specifications is not implied. Exposure to Absolute
Maximum Rating conditions for extended periods may
affect device reliability.
Absolute Maximum Ratings*
Total Supply Voltage (V
DD
to V
SS
) ........................-18V
Input Voltage .................... V
DD
+ 0.3V) to (V
SS
– 0.3V)
Current Into Any Pin............................................ 10mA
While Operating ...................................... 100μA
Package Power Dissipation (T
A
- 70°C)
Plastic DIP............................................. 730mW
Plastic SOIC .......................................... 470mW
Operating Temperature Range
C Device....................................... 0°C to +70°C
Storage Temperature Range.............. -65°C to +150°C
TC911A AND TC911B ELECTRICAL SPECIFICATIONS
Electrical Characteristics:
V
S
= ±5V, T
A
= +25°C, unless otherwise indicated.
TC911A
Symbol
V
OS
TCV
OS
Parameter
Input Offset
Voltage
Average Temp.
Coefficient of
Input Offset
Voltage
Average Input
Bias Current
Average Input
Offset Current
Input Voltage
Noise
Common Mode
Rejection Ratio
Common Mode
Voltage Range
Open-Loop
Voltage Gain
Output Voltage
Swing
Closed Loop
Bandwidth
Slew Rate
Power Supply
Rejection Ratio
Operating
Supply Voltage
Range
Quiescent
Supply Current
Min
—
—
—
Typ
5
0.05
0.05
Max
15
0.15
0.15
Min
—
—
—
TC911B
Typ
15
0.1
0.1
Max
30
0.25
0.25
Unit
μV
Test Conditions
T
A
= +25°C
μV/°C
0°C
≤
T
A
≤
+70°C
μV/°C
-25°C
≤
T
A
≤
+85°C
(Note
1)
pA
nA
nA
pA
nA
μV
P-P
μV
P-P
dB
V
dB
V
MHz
R
L
= 10kΩ, V
OUT
= ±4V
R
L
= 10kΩ
Closed Loop Gain = +1
T
A
= +25°C
0°C
≤
T
A
≤
+70°C
-25°C
≤
T
A
≤
+85°
T
A
= +25°C
T
A
= +85°C
0.1 to 1Hz, R
S
≤
100Ω
0.1 to 10Hz, R
S
≤
100Ω
V
SS
≤
V
CM
≤
V
DD
- 2.2
I
B
—
—
—
—
—
—
—
110
V
SS
115
V
SS
+ 0.3
—
—
112
±3.3
6.5
—
—
—
—
5
—
0.65
11
116
—
120
—
1.5
2.5
—
—
—
350
70
3
4
20
1
—
—
—
V
DD
– 2
—
V
DD
– 0.9
—
—
—
±8
16
600
—
—
—
—
—
—
—
105
V
SS
110
V
SS
+ 0.3
—
—
105
±3.3
6.5
—
—
—
—
10
—
0.65
11
110
—
120
—
1.5
2.5
—
—
—
—
120
4
6
40
1
—
—
—
V
DD
– 2
—
V
DD
– 0.9
—
—
—
±8
16
800
I
OS
e
N
CMRR
CMVR
A
OL
V
OUT
BW
SR
PSRR
V
S
V/μsec R
L
= 10kΩ, C
L
= 50pF
dB
±3.3V to ±5.5V
V
V
μA
Split Supply
Single Supply
V
S
= ±5V
I
S
Note
1:
Characterized; not 100% tested.
©
2005 Microchip Technology Inc.
DS21481C-page 3
TC911A/TC911B
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in <Blue
References>Table 2-1.
performance and can be a functional pin compatible
replacement. Offset voltage correction potentiometers,
compensation capacitors, and chopper stabilization
capacitors can be removed when retro-fitting existing
equipment designs.
TABLE 2-1:
Pin Number
1, 5, 8
2
3
4
6
7
PIN FUNCTION TABLE
3.2
Symbol
NC
-INPUT
+INPUT
V
SS
OUTPUT
V
DD
Description
No Internal Connection.
Inverting Input
Non-inverting Input
Negative Power Supply
Output
Positive Power Supply
Thermocouple Errors
3.0
3.1
DETAILED DESCRIPTION
Pin Compatibility
Heating one joint of a loop made from two different
metallic wires causes current flow. This is known as the
Seebeck effect. By breaking the loop, an open circuit
voltage (Seebeck voltage) can be measured. Junction
temperature and metal type determine the magnitude.
Typical values are 0.1μV/°C to 10μV/°C. Thermal
induced voltages can be many times larger than the
TC911 offset voltage drift. Unless unwanted thermo-
couple potentials can be controlled, system perfor-
mance will be less than optimum.
Unwanted thermocouple junctions are created when
leads are soldered or sockets/connectors are used.
Low thermo-electric coefficient solder can reduce
errors. A 60% Sn/36% Pb solder has 1/10 the thermal
voltage of common 64% Sn/36% Pb solder at a copper
junction.
The number and type of dissimilar metallic junctions in
the input circuit loop should be balanced. If the junc-
tions are kept at the same temperature, their summa-
tion will add to zero-canceling errors (Figure 3-1).
Shielding precision analog circuits from air currents -
especially those caused by power dissipating compo-
nents and fans - will minimize temperature gradients
and thermocouple induced errors.
The CMOS TC911 is pin compatible with the industry
standard ICL7650 chopper stabilized amplifier. The
ICL7650 must use external 0.1μF capacitors con-
nected at pins 1 and 8.
With the TC911, external off-
set voltage error canceling capacitors are not
required.
On the TC911 pins 1, 8 and 5 are not con-
nected internally. The ICL7650 uses pin 5 as an
optional output clamp connection. External chopper
capacitors and clamp connections are not necessary
with the TC911. External circuits connected to pins 1, 8
and 5 will have no effect. The TC911 can be quickly
evaluated in existing ICL7650 designs. Since external
capacitors are not required, system part count, assem-
bly time and total system cost are reduced. Reliability
is increased and PC board layout eased by having the
error storage capacitors integrated on the TC911 chip.
The TC911 pinout matches many existing op amps:
741, LM101, LM108, OP05–OP08, OP-20, OP-21,
ICL7650 and ICL7652. In many applications operating
from +5V supplies, the TC911 offers superior electrical
FIGURE 3-1:
UNWANTED THERMOCOUPLE ERRORS ELIMINATED BY REDUCING
THERMAL GRADIENTS AND BALANCING JUNCTIONS
J
3
= J
4
J
2
= J
5
No Temperature Differential and same
J
1
= J
6
Metallic Connection
J
2
J
1
J
3
J
2
Package –
Pin
J3 V
3
+
+
J4 V
4
–
+
V
2
–
+
J
1
V
1
–
V
T
= V
1
+ V
2
+ V
3
– V
4
– V
5
– V
6
= 0
J
4
J
5
J
6
V
T
= 0
+
V
5
J
5
–
+
V
6
J
6
–
DS21481C-page 4
©
2005 Microchip Technology Inc.
TC911A/TC911B
3.3
Avoiding Latchup
Junction isolated CMOS circuits inherently contain a
parasitic p-n-p-n transistor circuit. Voltages exceeding
the supplies by 0.3V should not be applied to the
device pins. Larger voltages can turn the p-n-p-n
device on, causing excessive device power supply cur-
rent and excessive power dissipation. TC911 power
supplies should be established at the same time or
before input signals are applied. If this is not possible,
input current should be limited to 0.1mA to avoid trig-
gering the p-n-p-n structure.
3.4
Overload Recovery
The TC911 recovers quickly from the output saturation.
Typical recovery time from positive output saturation is
20msec. Negative output saturation recovery time is
typically 5msec.
©
2005 Microchip Technology Inc.
DS21481C-page 5
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