DSPIC33FJ06GS202A-I/MM datasheet, PDF

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DSPIC33FJ06GS202A-I/MM: DescriptionDSPIC33FJ06GS202A-I/MM; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，387 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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DSPIC33FJ06GS202A-I/MM Overview

DSPIC33FJ06GS202A-I/MM

DSPIC33FJ06GS202A-I/MM Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	113794471
package instruction	QFN-28
Reach Compliance Code	compliant
Country Of Origin	Thailand
ECCN code	3A991.A.2
Factory Lead Time	12 weeks
YTEOL	7.75
Address bus width
bit size	16
boundary scan	YES
External data bus width
Integrated cache	NO
JESD-30 code	S-PQCC-N28
JESD-609 code	e3
length	6 mm
low power mode	NO
Number of DMA channels
Number of external interrupt devices	3
Number of serial I/Os	1
Number of terminals	28
Number of timers	2
On-chip data RAM width	16
On-chip program ROM width	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC28,.24SQ,25
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
power supply	3.3 V
Certification status	Not Qualified
ROM programmability	FLASH
Maximum seat height	1 mm
Maximum slew rate	125 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	NO LEAD
Terminal pitch	0.65 mm
Terminal location	QUAD
width	6 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, CONTROLLER

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dsPIC33FJ06GS101/X02 and

dsPIC33FJ16GSX02/X04

16-bit Digital Signal Controllers (up to 16 KB Flash and up to 2 KB

SRAM) with High-Speed PWM, ADC, and Comparators

Operating Conditions

• 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS

• 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS

• 3.0V to 3.6V, -40ºC to +85ºC, DC to 50 MIPS

Advanced Analog Features (Continued)

• Up to four High-Speed Comparators with direct

connection to the PWM module:

- Programmable references with 1024 voltage points

Core: 16-bit dsPIC33F CPU

•

Code-efficient (C and Assembly) architecture

Two 40-bit wide accumulators

Single-cycle (MAC/MPY) with dual data fetch

Single-cycle mixed-sign MUL plus hardware divide

32-bit multiply support

Timers/Output Compare/Input Capture

• Three general purpose timers:

- Three 16-bit and one 32-bit timer/counter

• Two Output Compare (OC) modules

• Two Input Capture (IC) modules

• Peripheral Pin Select (PPS) to allow function remap

Clock Management

•

±2.0% internal oscillator

Programmable PLLs and oscillator clock sources

Fail-Safe Clock Monitor (FSCM)

Independent Watchdog Timer (WDT)

Fast wake-up and start-up

Communication Interfaces

• UART module (12.5 Mbps)

- With support for LIN 2.0 protocols and IrDA

• 4-wire SPI module

• I

C™ module (up to 1 Mbaud) with SMBus support

• PPS to allow function remap

Power Management

• Low-power management modes (Sleep, Idle, Doze)

• Integrated Power-on Reset and Brown-out Reset

Input/Output

• Sink/Source 18 mA on 8 pins, 10 mA on 10 pins, and 6

mA on 17 pins

• 5V-tolerant pins

• Selectable open drain and pull-ups

• External interrupts on up to 30 I/O pins

High-Speed PWM

•

Up to four PWM pairs with independent timing

Dead time for rising and falling edges

1.04 ns PWM resolution

PWM support for:

- DC/DC, AC/DC, Inverters, PFC, and Lighting

• Programmable Fault inputs

• Flexible trigger configurations for ADC conversions

Qualification and Class B Support

• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC)

• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC)

• Class B Safety Library, IEC 60730, VDE certified

Debugger Development Support

•

In-circuit and in-application programming

Two breakpoints

IEEE 1149.2-compatible (JTAG) boundary scan

Trace and run-time watch

Advanced Analog Features

• ADC module:

- 10-bit resolution with up to 2 Successive Approximation

Sample and Hold (S&H) circuits

- Up to 12 input channels grouped into six conversion

pairs plus two voltage reference monitoring inputs

- Dedicated result buffer for each analog channel

• Flexible and independent ADC trigger sources

Packages

SPDIP

Pin Count

I/O Pins

Contact Lead/Pitch

1.27

.100''

Dimensions

10.30x7.50x2.65 17.9x7.50x2.05 1.365x.240x.120”

Note:

All dimensions are in millimeters (mm) unless specified.

Type

SOIC

QFN-S

0.65

6x6x0.9

QFN

0.65

8x8x1

TQFP

0.80

10x10x1

VTLA

0.50

6x6x0.9

2008-2012 Microchip Technology Inc.

DS70318F-page 1

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