74AHC14; 74AHCT14
Hex inverting Schmitt trigger
Rev. 05 — 4 May 2009
Product data sheet
1. General description
The 74AHC14; 74AHCT14 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7A.
The 74AHC14; 74AHCT14 provides six inverting buffers with Schmitt-trigger action. They
are capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
2. Features
I
I
I
I
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than V
CC
Input levels:
N
For 74AHC14: CMOS level
N
For 74AHCT14: TTL level
I
ESD protection:
N
HBM EIA/JESD22-A114E exceeds 2000 V
N
MM EIA/JESD22-A115-A exceeds 200 V
N
CDM EIA/JESD22-C101C exceeds 1000 V
I
Multiple package options
I
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
NXP Semiconductors
74AHC14; 74AHCT14
Hex inverting Schmitt trigger
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74AHC14
74AHC14D
74AHC14PW
74AHC14BQ
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
SO14
TSSOP14
DHVQFN14
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT108-1
SOT402-1
Description
Version
Type number
plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals; body
2.5
×
3
×
0.85 mm
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT108-1
SOT402-1
74AHCT14
74AHCT14D
74AHCT14PW
74AHCT14BQ
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
SO14
TSSOP14
DHVQFN14
plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals; body
2.5
×
3
×
0.85 mm
4. Functional diagram
1
2
3
1
1A
1Y
2
5
4
4
3
2A
2Y
6
5
3A
3Y
6
9
8
9
4A
4Y
8
11
10
11
5A
5Y
10
13
12
13
6A
6Y
12
A
Y
mna025
mna204
001aac497
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram
(one Schmitt-trigger)
74AHC_AHCT14_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 4 May 2009
2 of 16
NXP Semiconductors
74AHC14; 74AHCT14
Hex inverting Schmitt trigger
5. Pinning information
5.1 Pinning
terminal 1
index area
1Y
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
001aac498
2
3
4
5
6
7
GND
4Y
8
14 V
CC
13 6A
12 6Y
11 5A
10 5Y
9
4A
14 V
CC
13 6A
12 6Y
2A
2Y
3A
3Y
14
11 5A
10 5Y
9
8
4A
4Y
GND
(1)
1
1A
14
001aac499
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input.
Fig 4.
Pin configuration SO14 and TSSOP14
Fig 5.
Pin configuration DHVQFN14
5.2 Pin description
Table 2.
Symbol
1A
1Y
2A
2Y
3A
3Y
GND
4Y
4A
5Y
5A
6Y
6A
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
data input 1
data output 1
data input 2
data output 2
data input 3
data output 3
ground (0 V)
data output 4
data input 4
data output 5
data input 5
data output 6
data input 6
supply voltage
74AHC_AHCT14_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 4 May 2009
3 of 16
NXP Semiconductors
74AHC14; 74AHCT14
Hex inverting Schmitt trigger
6. Functional description
Table 3.
Input
nA
L
H
[1]
H = HIGH voltage level;
L = LOW voltage level.
Function table
[1]
Output
nY
H
L
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
−0.5
−0.5
Max
+7.0
+7.0
-
+20
+25
+75
-
+150
500
Unit
V
V
mA
mA
mA
mA
mA
°C
mW
V
I
<
−0.5
V
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
−0.5
V to (V
CC
+ 0.5 V)
[1]
[1]
−20
−20
−25
-
−75
−65
T
amb
=
−40 °C
to +125
°C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO14 packages: above 70
°C
the value of P
tot
derates linearly at 8 mW/K.
For TSSOP14 packages: above 60
°C
the value of P
tot
derates linearly at 5.5 mW/K.
For DHVQFN14 packages: above 60
°C
the value of P
tot
derates linearly at 4.5 mW/K.
8. Recommended operating conditions
Table 5.
Symbol
74AHC14
V
CC
V
I
V
O
T
amb
74AHCT14
V
CC
V
I
V
O
T
amb
74AHC_AHCT14_5
Operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
supply voltage
input voltage
output voltage
ambient temperature
Conditions
Min
2.0
0
0
−40
4.5
0
0
−40
Typ
5.0
-
-
+25
5.0
-
-
+25
Max
5.5
5.5
V
CC
+125
5.5
5.5
V
CC
+125
Unit
V
V
V
°C
V
V
V
°C
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 4 May 2009
4 of 16
NXP Semiconductors
74AHC14; 74AHCT14
Hex inverting Schmitt trigger
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74AHC14
V
OH
HIGH-level
output voltage
V
I
= V
T+
or V
T−
I
O
=
−50 µA;
V
CC
= 2.0 V
I
O
=
−50 µA;
V
CC
= 3.0 V
I
O
=
−50 µA;
V
CC
= 4.5 V
I
O
=
−4.0
mA; V
CC
= 3.0 V
I
O
=
−8.0
mA; V
CC
= 4.5 V
V
OL
LOW-level
output voltage
V
I
= V
T+
or V
T−
I
O
= 50
µA;
V
CC
= 2.0 V
I
O
= 50
µA;
V
CC
= 3.0 V
I
O
= 50
µA;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
I
I
CC
C
I
C
O
input leakage
current
supply current
input
capacitance
output
capacitance
HIGH-level
output voltage
V
I
= V
T+
or V
T−
I
O
=
−50 µA;
V
CC
= 4.5 V
I
O
=
−8.0
mA; V
CC
= 4.5 V
V
OL
LOW-level
output voltage
V
I
= V
T+
or V
T−
I
O
= 50
µA;
V
CC
= 4.5 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
I
I
CC
∆I
CC
input leakage
current
supply current
additional
supply current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
per input pin;
V
I
= V
CC
−
2.1 V; other pins
at V
CC
or GND; I
O
= 0 A;
V
CC
= 4.5 V to 5.5 V
-
-
-
-
-
0
-
-
-
-
0.1
0.36
0.1
2.0
1.35
-
-
-
-
-
0.1
0.44
1.0
20
1.5
-
-
-
-
-
0.1
0.55
2.0
40
1.5
V
V
µA
µA
mA
4.4
3.94
4.5
-
-
-
4.4
3.80
-
-
4.4
3.70
-
-
V
V
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
-
-
-
-
-
-
-
-
-
0
0
0
-
-
-
-
3
4
0.1
0.1
0.1
0.36
0.36
0.1
2.0
10
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
1.0
20
10
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
2.0
40
10
-
V
V
V
V
V
µA
µA
pF
pF
1.9
2.9
4.4
2.58
3.94
2.0
3.0
4.5
-
-
-
-
-
-
-
1.9
2.9
4.4
2.48
3.80
-
-
-
-
-
1.9
2.9
4.4
2.40
3.70
-
-
-
-
-
V
V
V
V
V
Conditions
Min
25
°C
Typ
Max
−40 °C
to +85
°C −40 °C
to +125
°C
Unit
Min
Max
Min
Max
74AHCT14
V
OH
C
I
C
O
input
capacitance
output
capacitance
-
-
3
4
10
-
-
-
10
-
-
-
10
-
pF
pF
74AHC_AHCT14_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 4 May 2009
5 of 16
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