Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
DESCRIPTION
The MC145406 is a silicon-gate CMOS IC that combines 3 drivers
and 3 receivers to fulfill the electrical specifications of standards
EIA-232-D and CCITT V.28. The drivers feature true TTL input
compatibility, slew-rate limited output, 300
Ω
power-off source
impedance, and output typically switching to within 25% of the
supply rails. The receivers can handle up to +25V while presenting
3 to 7kΩ impedance. Hysteresis in the receiver aids reception of
noisy signals. By combining both drivers and receivers in a single
CMOS chip, the MC145406 provides efficient, low-power solutions
for EIA-232-D and V.28 applications.
PIN CONFIGURATION
D and N Packages
V
DD
RX
1
TX
1
RX
2
TX
2
RX
3
TX
3
1
2
3
4
5
6
7
8
R
D
R
D
R
D
16
15
14
13
12
11
10
9
V
CC
DO1
DI1
DO2
DI2
DO3
DI3
GND
APPLICATIONS
•
Modem interface
•
Voice/data telephone interface
•
Lap-top computers
•
UART interface
FEATURES
V
SS
NOTE:
D = Driver
R = Receiver
•
Drivers
•
+5 to +12V supply range
•
300Ω power-off source impedance
•
Output current limiting
•
TTL compatible
ORDERING INFORMATION
DESCRIPTION
16-Pin Plastic Dual In-Line (DIP) Package
16-Pin Small Outline Large (SOL) Package
•
Maximum slew rate = 30V/µs
•
Receivers
•
+25V input voltage range over the full supply range
•
3 to 7kΩ input impedance
•
Hysteresis on input switchpoint
•
General
•
Very low supply currents for long battery life
•
Operation is independent of power supply sequencing
TEMPERATURE RANGE
0 to +70
°
C
0 to +70
°
C
ORDER CODE
MC145406N
MC145406D
DWG #
0406C
0171B
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
V
DD
V
SS
V
IR
Supply voltage
Supply voltage
Supply voltage
Input voltage range
RX
1-3
inputs
DI
1-3
inputs
DC current per pin
P
D
T
A
T
STG
θ
JA
PARAMETER
RATING
-0.5 to +6.0
-0.5 to +13.5
+0.5 to -13.5
(V
SS
- 15) to (V
DD
+ 15)
-0.5 to (V
CC
+ 0.5)
+100
1.0
0 to +70
-65 to +150
80
105
UNITS
V
V
V
V
mA
W
Power dissipation (package)
Operating temperature range
Storage temperature range
Thermal impedance
N package
D package
°
C
°
C
°
C/W
NOTE:
This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is
advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < V
DI
< V
DD
and GND < V
DO
< V
CC
. Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to V
SS
< V
TX1-3
< V
DD
. Unused inputs
must always be tied to an appropriate logic voltage level (e.g., GND or V
CC
for DI, and V
SS
or V
DD
for RX).
August 31, 1994
467
853-1430 13721
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
BLOCK DIAGRAM
RECEIVER
15k
RX
V
CC
V
CC
+
DO
–
5.4k
V
SS
1.0V
V
DD
DRIVER
HYSTERESIS
V
CC
1.8V
300
TX
LEVEL
SHIFT
+
–
1.4V
DI
V
SS
PIN #
1
8
16
9
2, 4, 6
SYMBOL
V
DD
V
SS
V
CC
GND
RX
1
, RX
2
, RX
3
PIN DESCRIPTION
Positive power supply.
The most positive power supply pin, which is typically 5 to 12 volts.
Negative power supply.
The most negative power supply pin, which is typically -5 to -12 volts.
Digital power supply.
The digital supply pin, which is connected to the logic power supply (maximum +5.5V).
Ground.
Ground return pin is typically connected to the signal ground pin of the EIA-232-D connector (Pin 7)
as well as to the logic power supply ground.
Receive Data Input.
These are the EIA-232-D receive signal inputs whose voltages can range from +25 to
-25V. A voltage between +3 and +25 is decoded as a space and causes the corresponding DO pin to swing
to ground (0V); a voltage between -3 and -25V is decoded as a mark and causes the DO pin to swing up to V
CC
.
The actual turn-on input switchpoint is typically biased at 1.8V above ground, and includes 800mV of hysteresis
for noise rejection. The nominal input impedance is 5kΩ. An open or grounded input pin is interpreted as a mark,
forcing the DO pin to V
CC
.
Data Output.
These are the receiver digital output pins, which swing from V
CC
to GND. A space on the RX
pin causes DO to produce a logic zero; a mark produces a logic one. Each output pin is capable of driving one
LSTTL input load.
Data Input.
These are the high-impedance digital input pins to the drivers. TTL compatibility is accomplished
by biasing the input switchpoint at 1.4V above ground. However, 5V CMOS compatibility is maintained as well.
Input voltage levels on these pins must be between V
CC
and GND.
Transmit Data Output.
These are the EIA-232-D transmit signal output pins, which swing toward V
DD
and V
SS
.
A logic one at a DI input causes the corresponding TX output to swing toward V
SS
. A logic zero causes the
output to swing toward V
DD
(the output voltages will be slightly less than V
DD
or V
SS
depending upon the output
load). Output slew rates are limited to a maximum of 30V/µs. When the MC145406 is off (V
DD
= V
SS
= V
CC
= GND), the minimum output impedance is 300Ω.
11, 13, 15
DO1, DO2, DO3
10, 12, 14
DI1, DI2, DI3
3, 5, 7
TX1, TX2, TX3
August 31, 1994
468
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
V
DD
V
SS
V
IR
Supply voltage
Supply voltage
Supply voltage
Input voltage range
RX
1-3
inputs
DI
1-3
inputs
DC current per pin
P
D
T
A
T
STG
θ
JA
PARAMETER
RATING
-0.5 to +6.0
-0.5 to +13.5
+0.5 to -13.5
(V
SS
- 15) to (V
DD
+ 15)
-0.5 to (V
CC
+ 0.5)
+100
1.0
0 to +70
-65 to +150
80
105
UNITS
V
V
V
V
mA
W
Power dissipation (package)
Operating temperature range
Storage temperature range
Thermal impedance
N package
D package
°
C
°
C
°
C/W
NOTE:
This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is
advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < V
DI
< V
DD
and GND < V
DO
< V
CC
. Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to V
SS
< V
TX1-3
< V
DD
. Unused inputs
must always be tied to an appropriate logic voltage level (e.g., GND or V
CC
for DI, and V
SS
or V
DD
for RX).
DC ELECTRICAL CHARACTERISTICS
Typical values are at T
A
= 0 to 70
°
C; GND = 0V, unless otherwise specified.
LIMITS
SYMBOL
DC supply voltage
V
DD
V
SS
V
CC
Quiescent supply current (outputs unloaded, inputs low)
I
DD
I
SS
I
CC
V
DD
= +12V
V
SS
= -12V
V
CC
= +5V
20
280
260
400
600
450
µA
µA
µA
4.5
-4.5
4.5
5 to 12
-5 to -12
5.0
13.2
-13.2
5.5
V
V
V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
RECEIVER ELECTRICAL CHARACTERISTICS
Typical values are at T
A
= 0 to 70
°
C; GND = 0V; V
DD
= +5 to +12V; V
SS
= -5 to -12V; V
CC
= +5V +5%, unless otherwise specified.
LIMITS
SYMBOL
V
ON
V
OFF
V
ON
-V
OFF
R
IN
V
OH
PARAMETER
Input turn-on threshold
Input turn-off threshold
Input threshold hysteresis
Input resistance
High level output voltage
V
RX1-3
= -3V to (V
SS
-15V)
1
Low level output voltage
DO
1-3
V
RX1-3
= +3V to (V
DD
+15V)
1
RX
1-3
RX
1-3
RX
1-3
RX
1-3
DO
1-3
TEST CONDITIONS
V
DO1-3
= V
OL
, V
CC
= 5.0V +5%
V
DO1-3
= V
OH
, V
CC
= 5.0V +5%
V
CC
= 5.0V +5%
(V
SS
-15V) < V
RX1-3
< (V
DD
+15V)
I
OH
= -20µA, V
CC
= +5.0V
I
OH
= -1mA, V
CC
= +5.0V
I
OL
= +20µA, V
CC
= +5.0V
V
OL
I
OL
= +2mA, V
CC
= +5.0V
I
OL
= +4mA, V
CC
= +5.0V
MIN
1.35
0.75
0.6
3.0
4.9
3.8
TYP
1.80
1.00
0.8
5.0
5.0
4.4
0.005
0.15
0.3
0.1
0.5
0.7
V
V
7.0
MAX
2.35
1.25
UNITS
V
V
V
kΩ
NOTE:
1. This is the range of input voltages as specified by EIA-232-D to cause a receiver to be in the high or low logic state.
August 31, 1994
469
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
DRIVER ELECTRICAL CHARACTERISTICS
Typical values are at T
A
= 0 to 70
°
C; GND = 0V; V
CC
= +5V +5%, unless otherwise specified.
LIMITS
SYMBOL
V
IL
V
IH
I
IN
PARAMETER
Digital input voltage
Digital input voltage
Input current
DI
1-3
DI
1-3
DI
1-3
TEST CONDITIONS
Logic 0
Logic 1
V
DI1-3
= V
CC
V
DD
= +5.0V, V
SS
= -5.0V
V
OH
Output high voltage
TX
1-3
V
DI1-3
= Logic 0, R
L
= 3.0kΩ
V
DD
= +6.0V, V
SS
= -6.0V
V
DD
= +12.0V, V
SS
= -12.0V
V
DD
= +5.0V, V
SS
= -5.0V
V
OL
Output low
TX
1-3
V
DI1-3
= Logic 0, R
L
= 3.0kΩ
Off source resistance
Figure 1
I
SC
Output short-circuit current
V
DD
= +12.0V, V
SS
= -12.0V
TX
1-3
TX
1-3
voltage
1
V
DD
= +6.0V, V
SS
= -6.0V
V
DD
= +12.0V, V
SS
= -12.0V
V
DD
=V
SS
=GND=0V, V
TX1-3
= +2.0V
TX
1-3
shorted to GND
2
TX
1-3
shorted to +15.0V
3
3.5
4.3
9.2
-4.0
-4.5
-10.0
300
+22
+60
+
60
MIN
TYP
MAX
0.8
UNITS
V
V
µA
2.0
+1.0
4.1
5.0
10.4
-4.3
-5.2
-10.3
V
V
Ω
mA
mA
+100
NOTE:
1. The voltage specifications are in terms of absolute values.
2. Specification is for one TX output pin to be shorted at a time. Should all three driver outputs be shorted simultaneously, device power dis-
sipation limits will be exceeded.
3. This condition could exceed package limitations.
SWITCHING CHARACTERISTICS
Typical values are at T
A
= 0 to 70
°
C; V
CC
= +5V +5%, unless otherwise specified. (See Figures 2 and 3)
LIMITS
SYMBOL
Drivers
t
PLH
t
PHL
Propagation delay time
Propagation delay time
Output slew rate
(minimum load)
SR
Output slew rate
(maximum load)
TX
1-3
TX
1-3
TX
1-3
TX
1-3
Low-to-High R
L
= 3kΩ, C
L
= 50pF
High-to-Low R
L
= 3kΩ, C
L
= 50pF
R
L
= 7kΩ, C
L
= 0pF,
V
DD
= 6 to 12.0V, V
SS
= -6 to -12V
R
L
= 3kΩ, C
L
= 2500pF,
V
DD
= 12V, V
SS
= -12V
Low-to-High
High-to-Low
300
300
+6
+3.0
500
500
+30
V/µs
ns
ns
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Receivers (C
L
= 50pF)
t
PLH
t
PHL
t
R
t
F
Propagation delay time
Propagation delay time
Output rise time
Output fall time
DO
1-3
DO
1-3
DO
1-3
DO
1-3
150
150
120
40
425
425
400
100
ns
ns
ns
ns
August 31, 1994
470
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
1
14
V
DD
DI
1
16
V
CC
TX
1
3
12
DI
2
TX
2
5
V
IN
= +2V
defines the electrical and physical interface between Data
Communication Equipment (DCE) and Data Terminal Equipment
(DTE). A DCE is connected to a DTE using a cable that typically
carries up to 25 leads, which allow the transfer of timing, data,
control, and test signals. The MC145406 provides the necessary
level shifting between the TTL/CMOS logic levels and the high
voltage levels of EIA-232-D (ranging from +3 to +25V).
DRIVERS
7
10
DI
3
TX
3
V
SS
8
9
R
OUT
=
V
IN
I
Figure 1. Power-Off Source Resistance (Drivers)
As defined by the specification, an EIA-232-D driver presents a
voltage of between +5 to +15V into a load of between 3 to 7kΩ. A
logic one at the driver input results in a voltage of between -5 to
-15V. A logic zero results in a voltage between +5 to +15V. When
operating at +7 to +12V, the MC145406 meets this requirement.
When operating at +5V, the MC145406 drivers produce less than
+5V at the output (when terminated), which does not meet the
EIA-232-D specification. However, the output voltages when using
a +5V power supply are high enough (around +4V) to permit proper
reception by an EIA-232-D receiver, and can be used in applications
where strict compliance to EIA-232-D is not required.
Another requirement of the MC145406 drivers is that they withstand
a short to another driver in the EIA-232-D cable. The worst-case
condition that is permitted by EIA-232-D is a +15V source that is
current limited to 500mA. The MC145406 drivers can withstand this
condition momentarily. In most short circuit conditions the source
driver will have a series 300Ω output impedance needed to satisfy
the EIA-232-D driver requirements. This will reduce the short circuit
current to under 40mA which is an acceptable level for the
MC145406 to withstand.
Unlike some other drivers, the MC145406 drivers feature an
internally-limited output slew rate that does not exceed 30V/µs.
DRIVERS
DI
1-3
50%
3V
0V
t
F
TX
1-3
90%
10%
t
F
V
OH
V
OL
t
PHL
t
PLH
RECEIVERS
RX
1-3
50%
+3V
RECEIVERS
0V
t
PLH
V
OH
t
PHL
DO
1-3
90%
50%
10%
V
OL
t
F
t
F
The job of an EIA-232-D receiver is to level-shift voltages in the
range of -25 to +25V down to TTL/CMOS logic levels (0 to +5V). A
voltage of between -3 and -25V on RX
1
is defined as a mark and
produces a logic one at DO
1
. A voltage between +3 and +25V is a
space and produces a logic zero. While receiving these signals, the
RX inputs must present a resistance between 3 and 7kΩ.
Nominally, the input resistance of the RX
1-3
inputs is 5.0kΩ.
The input threshold of the RX
1-3
inputs is typically biased at 1.8V
above ground (GND) with typically 800mV of hysteresis included to
improve noise immunity. The 1.8V bias forces the appropriate DO
pin to a logic one when its RX input is open or grounded as called
for in EIA-232-D specification. Notice that TTL logic levels can be
applied to the RX inputs in lieu of normal EIA-232-D signal levels.
This might be helpful in situations where access to the modem or
computer through the EIA-232-D connector is necessary with TTL
devices. However, it is important not to connect the EIA-232-D
outputs (TX
1
) to TTL inputs since TTL operates off +5V only, and
may be damaged by the high output voltage of the MC145406.
The DO outputs are to be connected to a TTL or CMOS input (such
as an input to a modem chip). These outputs will swing from V
CC
to
ground, allowing the designer to operate the DO and DI pins from
the digital power supply. The TX and RX sections are independently
powered by V
DD
and V
SS
so that one may run logic at +5V and the
EIA-232-D signals at +12V.
Figure 2. Switching Characteristics
DRIVERS
3V
TX
1-3
–3V
t
SLH
–3V
t
SHL
3V
3V – (–3V)
SLEW RATE (SR) = –3V –3V
OR
t
SLH
t
SHL
Figure 3. Slew Rate Characteristics
APPLICATIONS INFORMATION
The MC145406 has been designed to meet the electrical
specifications of standards EIA-232-D/CCITT V.28 and as such,
August 31, 1994
471
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