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SY10EL35ZG TR

Description
flip flops JK flip-flop (I temp, green)
Categorysemiconductor    Other integrated circuit (IC)   
File Size47KB,4 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance  
Download Datasheet Parametric Compare View All

SY10EL35ZG TR Overview

flip flops JK flip-flop (I temp, green)

SY10EL35ZG TR Parametric

Parameter NameAttribute value
ManufactureMicrel
Product CategoryFlip Flops
RoHSYes
PackagingReel
Factory Pack Quantity1000
Micrel, Inc.
JK FLIP-FLOP
SY10EL35
SY100EL35
SY10EL35
SY100EL35
FEATURES
s
525ps propagation delay
s
2.2GHz toggle frequency
s
High bandwidth output transistions
s
Internal 75K
input pull-down resistors
s
Available in 8-pin SOIC package
DESCRIPTION
The SY10/100EL35 are high-speed JK Flip-Flops. The
J/K data enters the master portion of the flip-flop when
the clock is LOW and is transferred to the slave and,
thus, the outputs, upon a positive transition of the clock.
The reset pin is asynchronous and is activated with a
logic HIGH.
TRUTH TABLE
(1)
J
L
L
H
H
X
K
L
H
L
H
X
R
L
L
L
L
H
CLK
Z
Z
Z
Z
X
Qn+1
Qn
L
H
Qn
L
NOTE:
1. Z = LOW-to-HIGH transition.
M9999-121205
hbwhelp@micrel.com or (408) 955-1690
Rev.: G
Amendment: /0
1
1
Issue Date: December 2005

SY10EL35ZG TR Related Products

SY10EL35ZG TR SY100EL35ZG TR SY100EL35LZI-TR SY100EL35LZC-TR SY10EL35LZC-TR SY10EL35LZG-TR SY10EL35LZI-TR
Description flip flops JK flip-flop (I temp, green) flip flops JK flip-flop (I temp, green) 100EL SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8 100EL SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8 10EL SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8 10EL SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8 10EL SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
Maker - - Microchip Microchip Microchip Microchip Microchip
package instruction - - SOP, SOP, SOP, SOP, SOP,
Reach Compliance Code - - unknown unknown compliant compliant compliant
series - - 100EL 100EL 10EL 10EL 10EL
JESD-30 code - - R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 R-PDSO-G8
JESD-609 code - - e0 e0 e0 e4 e0
length - - 4.93 mm 4.93 mm 4.93 mm 4.93 mm 4.93 mm
Logic integrated circuit type - - J-K FLIP-FLOP J-K FLIP-FLOP J-K FLIP-FLOP J-K FLIP-FLOP J-K FLIP-FLOP
Number of digits - - 2 2 2 2 2
Number of functions - - 1 1 1 1 1
Number of terminals - - 8 8 8 8 8
Maximum operating temperature - - 85 °C 85 °C 85 °C 85 °C 85 °C
Output polarity - - COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material - - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - - SOP SOP SOP SOP SOP
Package shape - - RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form - - SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
propagation delay (tpd) - - 0.7 ns 0.7 ns 0.7 ns 0.7 ns 0.7 ns
Certification status - - Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height - - 1.73 mm 1.73 mm 1.73 mm 1.73 mm 1.73 mm
surface mount - - YES YES YES YES YES
technology - - ECL ECL ECL ECL ECL
Temperature level - - INDUSTRIAL COMMERCIAL EXTENDED COMMERCIAL EXTENDED INDUSTRIAL INDUSTRIAL
Terminal surface - - TIN LEAD TIN LEAD TIN LEAD NICKEL PALLADIUM GOLD TIN LEAD
Terminal form - - GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch - - 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location - - DUAL DUAL DUAL DUAL DUAL
Trigger type - - POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
width - - 3.94 mm 3.94 mm 3.94 mm 3.94 mm 3.94 mm
minfmax - - 1800 MHz 1800 MHz 1800 MHz 1800 MHz 1800 MHz
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