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Q67100-Q1136

Description
3.3V 4M x 4-Bit EDO-Dynamic RAM
File Size290KB,26 Pages
ManufacturerSIEMENS
Websitehttp://www.infineon.com/
Download Datasheet View All

Q67100-Q1136 Overview

3.3V 4M x 4-Bit EDO-Dynamic RAM

3.3V 4M x 4-Bit EDO-Dynamic RAM
HYB3116405BJ/BT(L) -50/-60/-70
HYB3117405BJ/BT(L) -50/-60/-70
Advanced Information
4 194 304 words by 4-bit organization
0 to 70 °C operating temperature
Performance
-50
tRAC
tCAC
tAA
tRC
tHPC
RAS access time
CAS access time
Access time from address
Read/Write cycle time
Hyper page mode (EDO)
cycle time
50
13
25
84
20
-60
60
15
30
104
25
-70
70
20
35
124
30
ns
ns
ns
ns
ns
Single + 3.3 V (± 0.3V ) supply
Low power dissipation
max. 396 active mW (HYB3117405BJ/BT-50)
max. 363 active mW (HYB3117405BJ/BT-60)
max. 330 active mW (HYB3117405BJ/BT-70)
max. 360 active mW (HYB3116405BJ/BT-50)
max. 324 active mW (HYB3116405BJ/BT-60)
max. 288 active mW (HYB3116405BJ/BT-70)
7.2 mW standby (LV-TTL)
3.6 mW standby (LV-CMOS)
720
µW
standby for L-version
Output unlatched at cycle end allows two-dimensional chip selection
Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh,
Self Refresh and test mode
Hyper page mode (EDO) capability
All inputs, outputs and clocks fully TTL-compatible
2048 refresh cycles / 32 ms for HYB3117405
4096 refresh cycles / 64 ms for HYB3116405
Plastic Package:
P-SOJ-26/24-1 (300 mil)
P-TSOPII-26/24-1 (300mil)
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