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SIT3922AI-2C2-33NM222.123456X

Description
LVDS Output Clock Oscillator, 222.123456MHz Nom,
CategoryPassive components    oscillator   
File Size391KB,11 Pages
ManufacturerSiTime
Environmental Compliance
Download Datasheet Parametric View All

SIT3922AI-2C2-33NM222.123456X Overview

LVDS Output Clock Oscillator, 222.123456MHz Nom,

SIT3922AI-2C2-33NM222.123456X Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid7157647278
Reach Compliance Codecompliant
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TR
maximum descent time0.6 ns
Frequency Adjustment - MechanicalNO
frequency stability25%
JESD-609 codee4
Installation featuresSURFACE MOUNT
Nominal operating frequency222.123456 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
physical size5.0mm x 3.2mm x 0.75mm
longest rise time0.6 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
SiT3922
Digitally Controlled Differential Oscillator (DCXO)
The Smart Timing Choice
The Smart Timing Choice
Features
Applications
Factory programmable between 220 MHz and 625 MHz accurate to
6 decimal places
Digital controlled pull range
Widest pull range options: ±25, ±50, ±100, ±200, ±400, ±800, ±1600
ppm
Superior pull range linearity of <= 1%, 10 times better than quartz
<0.6 ps RMS phase jitter (random) over 12 kHz to 20 MHz bandwidth
Industrial and extended commercial temperature ranges
Industry-standard packages: 3.2 mm x 2.5 mm, 5.0 mm x 3.2 mm and
7.0 mm x 5.0 mm
For frequencies lower than 220 MHz, refer to SiT3921 datasheet
Ideal for SONET, Video, Instrumentation, Satellite applications
Telecom, networking, broadband
Electrical Characteristics
Parameters
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
220
-10
-25
-50
Operating Temperature Range
Start-up Time
Duty Cycle
Pull Range
Linearity
Frequency Change Polarity
First Year Aging
10-year Aging
Input Low Voltage
Input Middle Voltage
Input High Voltage
Input High or Low Pulse Width
Input Middle Pulse Width
Input to Output Isolation
Input Impedance
Input Capacitance
Zin
Cin
TBD
2.97
2.25
Vdd-1.1
Vdd-1.9
1.2
RMS Period Jitter
T_jitt
RMS Phase Jitter (random)
T_phj
3.3
2.5
61
1.6
300
1.2
1.2
1.2
0.6
TBD
3.63
2.75
69
30
Vdd-0.7
Vdd-1.5
2.0
500
1.7
1.7
1.7
0.85
VIL
VIM
VIH
T_logic
T_middle
T_use
T_start
DC
PR
Lin
-2
-5
0.4xVdd
0.8xVdd
500
500
-40
-20
45
40
Typ.
Max.
625
+10
+25
+50
+85
+70
10
55
60
Unit
MHz
ppm
ppm
ppm
°C
°C
ms
%
%
ppm
%
+2
+5
0.2xVdd
0.6xVdd
ppm
ppm
V
V
V
ns
ns
TBD
k
pF
V
V
mA
mA
V
V
V
ps
ps
ps
ps
ps
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
Maximum average current drawn from OUT+ or OUT-
See Figure 9
See Figure 9
See Figure 9
20% to 80%
f = 266 MHz, Vdd = 3.3V or 2.5V
f = 312.5 MHz, Vdd = 3.3V or 2.5V
f = 622.08 MHz, Vdd = 3.3V or 2.5V
f = 312.5 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdds
Pin 1
Pin 1
25°C
25°C
f = 220 to 314 MHz and f = 528 to 625 MHz
f = 422 to 502 MHz
See the last page for Absolute Pull Range, APR table
Industrial
Extended Commercial
Condition
For frequency coverage see last page
Inclusive of initial tolerance, operating temperature, rated power,
supply voltage and load change
LVPECL and LVDS, Common DC and AC Characteristics
±25, ±50, ±100,
±200, ±400, ±800, ±1600
0.1
Positive Slope
1
LVPECL, DC and AC Characteristics
Supply Voltage
Current Consumption
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
Vdd
Idd
I-driver
VOH
VOL
V_Swing
Tr, Tf
SiTime Corporation
Rev. 1.1
990 Almanor Avenue
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised December 2, 2014
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