PROFET® BTS 640 S2
Smart Sense High-Side Power Switch
•
Short circuit protection
•
Current limitation
•
Proportional load current sense
•
CMOS compatible input
•
Open drain diagnostic output
•
Fast demagnetization of inductive loads
•
Undervoltage and overvoltage shutdown with
auto-restart and hysteresis
•
Overload protection
•
Thermal shutdown
•
Overvoltage protection including load dump (with
external GND-resistor)
•
Reverse battery protection (with external GND-
resistor)
•
Loss of ground and loss of
V
bb
protection
•
Electrostatic discharge
(ESD) protection
Features
Product Summary
Operating voltage
On-state resistance
Load current (ISO)
Current limitation
Package
TO220-7-11
V
bb(on)
R
ON
I
L(ISO)
I
L(SCr)
5.0 ... 34
V
30 mΩ
12.6
A
24
A
TO220-7-12
TO263-7-2
1
Standard (staggered)
1
SMD
1
Straight
Application
• µC
compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads
•
All types of resistive, inductive and capacitve loads
•
Replaces electromechanical relays, fuses and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, proportional sense of load current, monolithically integrated in Smart SIPMOS
®
technology. Fully
protected by embedded protection functions.
Block Diagram
4
+ V bb
Voltage
source
Overvoltage
protection
Current
limit
Gate
protection
OUT
V
Logic
Voltage
sensor
Charge pump
Level shifter
Rectifier
ESD
Logic
Output
Voltage
detection
Temperature
sensor
Limit for
unclamped
ind. loads
6, 7
I
L
3
1
IN
Current
Sense
Load
ST
R
O
5
GND
IS
I
IS
R
GND
IS
Signal GND
®
PROFET
Load GND
2
Semiconductor Group
Page 1 of 14
1999-Jul-20
BTS 640 S2
Pin
1
2
3
4
5
6&7
Symbol
ST
GND
IN
Vbb
IS
OUT
(Load, L)
Function
Diagnostic feedback: open drain, invers to input level
Logic ground
Input, activates the power switch in case of logical high signal
Positive power supply voltage, the tab is shorted to this pin
Sense current output, proportional to the load current, zero in
the case of current limitation of load current
Output, protected high-side power output to the load.
Both output pins have to be connected in parallel for operation
according this spec (e.g. k
ILIS
).
Design the wiring for the max. short circuit current
Maximum Ratings
at
T
j
= 25 °C unless otherwise specified
Parameter
Supply voltage
(overvoltage protection see page 4)
Supply voltage for full short circuit protection
Tj
Start=-40 ...+150°C
Symbol
V
bb
V
bb
Values
43
34
60
self-limited
-40 ...+150
-55 ...+150
85
0,41
3,5
1.0
4.0
8.0
-10 ... +16
±2.0
±5.0
±14
Unit
V
V
V
A
°C
W
J
kV
Load dump protection
1
) VLoadDump = VA + Vs, VA = 13.5V
R
I2)= 2
Ω,
R
L= 1
Ω,
t
d= 200 ms, IN= low or high
V
Load dump3
)
I
L
T
j
T
stg
P
tot
Load current
(Short circuit current, see page 5)
Operating temperature range
Storage temperature range
Power dissipation
(DC), TC
≤
25 °C
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V,
T
j,start = 150°C,
T
C = 150°C const.
I
L
= 12.6 A, Z
L
= 4,2 mH, 0
Ω:
E
AS
I
L
= 4 A, Z
L
= 330 mH, 0
Ω:
E
AS
Electrostatic discharge capability (ESD)
IN:
V
ESD
(Human Body Model)
ST, IS:
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5kΩ; C=100pF
Input voltage
(DC)
Current through input pin
(DC)
Current through status pin
(DC)
Current through current sense pin
(DC)
see internal circuit diagrams page 7
V
IN
I
IN
I
ST
I
IS
V
mA
1
)
2)
3)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
Ω
resistor in the GND connection is recommended).
R
I
= internal resistance of the load dump test pulse generator
V
Load dump
is setup without the DUT connected to the generator according to ISO 7637-1 and DIN 40839
Semiconductor Group
Page 2
1999-Jul-20
BTS 640 S2
Thermal Characteristics
Parameter and Conditions
Thermal resistance
Symbol
min
--
--
--
chip - case
:
R
thJC
junction - ambient (free air):
R
thJA
SMD version, device on PCB
4)
:
Values
typ
max
-- 1.47
--
75
33
--
Unit
K/W
Electrical Characteristics
Parameter and Conditions
at
T
j
= 25 °C,
V
bb
= 12 V unless otherwise specified
Symbol
Values
min
typ
max
Unit
Load Switching Capabilities and Characteristics
On-state resistance
(pin 4 to 6&7)
I
L = 5 A
T
j
=25 °C:
R
ON
T
j
=150 °C:
V
ON(NL)
I
L(ISO)
I
L(NOM)
I
L(GNDhigh)
t
on
t
off
dV /dt
on
-dV/dt
off
--
27
54
50
12.6
4.5
--
70
80
--
--
30
60
--
--
--
8
150
200
1
1
mΩ
Output voltage drop limitation at small load
currents
(pin 4 to 6&7), see page 13
IL
= 0.5 A
V
ON = 0.5 V,
T
C = 85 °C
Tj
=-40...+150°C:
--
11.4
4.0
--
25
25
0.1
0.1
mV
A
A
mA
µs
V/µs
V/µs
Nominal load current, ISO Norm
(pin 4 to 6&7)
Nominal load current, device on PCB
4)
T
A = 85 °C,
T
j
≤
150 °C
V
ON
≤
0.5 V,
Output current (pin 6&7) while GND disconnected
or GND pulled up,
V
bb=30 V,
V
IN= 0, see diagram page
9; not tested, specified by design
Turn-on time
Turn-off time
Slew rate on
R
L = 12
Ω,
T
j =-40...+150°C
IN
IN
to 90%
V
OUT:
to 10%
V
OUT:
10 to 30%
V
OUT,
R
L = 12
Ω,
T
j =-40...+150°C
70 to 40%
V
OUT,
R
L = 12
Ω,
T
j =-40...+150°C
Slew rate off
4
)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air.
Semiconductor Group
Page 3
1999-Jul-20
BTS 640 S2
Parameter and Conditions
at
T
j
= 25 °C,
V
bb
= 12 V unless otherwise specified
Symbol
Values
min
typ
max
Unit
Operating Parameters
Operating voltage
5
)
Undervoltage shutdown
Undervoltage restart
V
bb(on)
T
j =-40...+150°C:
V
bb(under)
Tj
=-40...+25°C:
V
bb(u rst)
Tj
=+150°C:
Undervoltage restart of charge pump
see diagram page 12
T
j =-40...+25°C:
V
bb(ucp)
T
j =25...150°C:
Undervoltage hysteresis
∆
V
bb(under)
T
j =-40...+150°C:
∆
Vbb(under)
=
Vbb(u
rst) -
Vbb(under)
5.0
3.2
--
--
--
--
34
33
--
41
43
--
--
--
--
--
--
4.5
4.7
--
0.5
--
--
1
--
47
4
12
--
1.2
34
5.0
5.5
6.0
6.5
7.0
--
43
--
--
--
52
15
25
10
3
V
V
V
V
V
V
V
V
V
µA
µA
mA
Overvoltage shutdown
Overvoltage restart
Overvoltage hysteresis
Overvoltage protection
6
)
I
bb=40 mA
V
bb(over)
T
j =-40...+150°C:
V
bb(o rst)
T
j =-40...+150°C:
∆
V
bb(over)
Tj
=-40°C:
V
bb(AZ)
Tj
=+25...+150°C
Tj
=-40...+150°C:
Standby current (pin 4)
T
j
=-40...+25°C
:
I
bb(off)
T
j
= 150°C:
I
L(off)
Off state output current (included in
I
bb(off)
)
VIN=0
VIN=0,
Tj
=-40...+150°C:
Operating current
(Pin 2)7),
V
IN=5 V
I
GND
5
)
6)
7
)
At supply voltage increase up to
V
bb
= 4.7 V typ without charge pump,
V
OUT
≈
V
bb
- 2 V
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
Ω
resistor in the GND connection is recommended). See also
V
ON(CL)
in table of protection functions and
circuit diagram page 8.
Add
I
ST
, if
I
ST
> 0, add
I
IN
, if
V
IN
>5.5 V
Semiconductor Group
Page 4
1999-Jul-20
BTS 640 S2
Parameter and Conditions
at
T
j
= 25 °C,
V
bb
= 12 V unless otherwise specified
Symbol
Values
min
typ
max
Unit
Protection Functions
Initial peak short circuit current limit
(pin 4 to 6&7)
I
L(SCp)
T
j
=-40°C:
T
j
=25°C:
T
j
=+150°C:
Repetitive short circuit shutdown current limit
I
L(SCr)
Tj
=
Tjt
(see timing diagrams, page 11)
48
40
31
--
56
50
37
24
--
47
--
10
--
600
65
58
45
--
--
52
--
--
32
--
A
A
V
°C
K
V
mV
Output clamp
(inductive load switch off)
at
VOUT
=
Vbb
-
VON(CL); IL=
40 mA,
T
j
=-40°C:
T
j
=+25..+150°C:
Thermal overload trip temperature
Thermal hysteresis
Reverse battery
(pin 4 to 2)
8
)
Reverse battery voltage drop
(Vout > Vbb)
IL
= -5 A
T
j=150 °C:
Diagnostic Characteristics
Current sense ratio
9)
, static on-condition,
VIS
= 0...5 V,
Vbb(on)
= 6.510)...27V,
kILIS
=
IL
/
IIS
T
j
= -40°C,
I
L
= 5 A:
V
ON(CL)
T
jt
∆
T
jt
-
V
bb
-V
ON(rev)
41
43
150
--
--
--
k
ILIS
T
j
= -40°C,
I
L
= 0.5 A:
T
j
= 25...+150°C,
I
L
= 5 A:
,
T
j
= 25...+150°C,
I
L
= 0.5 A:
Current sense output voltage limitation
Tj
= -40 ...+150°C
I
IS = 0,
I
L = 5 A:
4550
3300
4550
4000
5000
5000
5000
5000
6.1
--
--
--
6000
8000
5550
6500
6.9
1
15
10
V
µA
V
IS(lim)
5.4
0
0
0
Current sense leakage/offset current
T
j = -40 ...+150°C
VIN=0, VIS
= 0,
IL
= 0:
I
IS(LL)
VIN=5
V,
VIS
= 0,
IL
= 0:
I
IS(LH)
VIN=5
V,
VIS
= 0,
VOUT
= 0
(short circuit)
I
IS(SH)
:
(
I
IS(SH) not tested, specified by design)
Current sense settling time to
I
IS static
±10%
after
positive input slope,
I
L = 0
5 A,
T
j= -40...+150°C (not tested, specified by design)
t
son(IS)
--
--
300
µs
8
)
Requires 150
Ω
resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 2 and circuit page 8).
9)
This range for the current sense ratio refers to all devices. The accuracy of the
k
can be raised at least by
ILIS
a factor of two by matching the value of
k
ILIS
for every single device.
In the case of current limitation the sense current
I
IS
is zero and the diagnostic feedback potential
V
ST
is
High. See figure 2b, page 10.
10)
Valid if
V
bb(u rst)
was exceeded before.
Semiconductor Group
Page 5
1999-Jul-20
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