JN
518
9
JN5189(T)/JN5188(T)
IEEE 802.15.4 low power wireless MCU
Rev. 1.3 — May 2021
product data sheet
1. General description
The JN5189 and JN5189T (called JN5189 throughout this document) are ultra-low power,
high performance Arm
®
Cortex
®
-M4 based wireless microcontrollers supporting
Zigbee 3.0 and Thread networking stacks to facilitate the development of Home
Automation, Smart Lighting and wireless sensor network applications.
The JN5189 includes a 2.4 GHz IEEE 802.15.4 compliant transceiver and a
comprehensive mix of analog and digital peripherals. Ultra-low current consumption in
both radio receive and transmit modes and also in the power down modes allow use of
coin cell batteries.
The product has 640 KB embedded Flash and 152 KB RAM memory. The embedded
flash can support Over The Air (OTA) code download to applications. The devices include
10-channel PWM, two timers, one RTC/alarm timer, a Windowed Watchdog Timer
(WWDT), two USARTs, two SPI interfaces, two I
2
C interfaces, a DMIC subsystem with
dual-channel PDM microphone interface with voice activity detector, one 12-bit ADC,
temperature sensor and comparator.
The JN5189T variant has an internal NFC tag and with connections to the external NFC
antenna.
The JN5188 variant has the same functionality as the JN5189 except for reduced memory
sizes of 320 KB embedded Flash, 88 KB RAM. The JN5188T variant has the functionality
of the JN5188 with the addition of an embedded NFC tag.
The Arm Cortex-M4 is a 32-bit core that offers system enhancements such as low power
consumption, enhanced debug features, and a high level support of the block integration.
The Arm Cortex-M4 CPU, operates at up to 48 MHz.
2. Features and benefits
2.1 Benefits
Very low current solution for long battery life
Single chip device to run stack and application
System BOM is low in component count and cost
Flexible sensor interfacing
Embedded NTAG on JN5189T and JN5188T devices
Package
6 6 mm HVQFN40, 0.5 mm pitch
Lead-free and RoHS compliant
Junction temperature range:
40 C
to +125
C
NXP Semiconductors
IEEE 802.15.4 low power wireless MCU
JN5189(T)/JN5188(T)
2.2 Radio features
2.4 GHz IEEE 802.15.4 2011 compliant
Receiver current 4.3 mA
IEEE 802.15.4 Receiver sensitivity
100
dBm
Improved co-existence with WiFi
Configurable transmit power up to +11 dBm, with 46 dB range
Transmit power / current +10 dBm / 20.28 mA
Transmit power / current +3 dBm / 9.44 mA
Transmit power / current 0 dBm / 7.36 mA
1.9 V to 3.6 V supply voltage
Antenna Diversity control
32 MHz XTAL cell with internal capacitors, able with suitable external XTAL to meet
the required accuracy for radio operation over the operating conditions
Integrated RF balun
Integrated ultra Low-power sleep oscillator
Deep Power-down current 350 nA (with wake-up from IO)
128-bit, 192-bit or 256-bit AES security processor
MAC accelerator with packet formatting, CRCs, address check, auto-acks, timers
2.3 Microcontroller features
Application CPU, Arm Cortex-M4 CPU:
Arm Cortex-M4 processor, running at a frequency of up to 48 MHz.
Arm built-in Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit (MPU)
Non-maskable Interrupt (NMI) with a selection of sources
Serial Wire Debug (SWD) with 8 breakpoints and 4 watchpoints
System tick timer
Includes Serial Wire Output for enhanced debug capabilities.
On-Chip memory
640 KB flash (320 KB for JN5188)
152 KB SRAM (88 KB for JN5188)
12 MHz to 48 MHz system clock speed for low-power
2 x I2C-bus interface, operate as either master or slave
10 x PWM
2 x Low-power timers
2 x USART, one with flow control
2 x SPI-bus, master or slave
1 x PDM digital audio interface with a hardware based voice activity detector to reduce
power consumption in voice applications. Support for dual-channel microphone
interface, flexible decimators, 16 entry FIFOs and optional DC blocking.
19-channel DMA engine for efficient data transfer between peripherals and SRAM, or
SRAM to SRAM. DMA can operate with fixed or incrementing addresses. Operations
can be chained together to provide complex functionality with low CPU overhead.
JN5189
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020-2021. All rights reserved.
Product data sheet
Rev. 1.3 — May 2021
2 of 92
NXP Semiconductors
IEEE 802.15.4 low power wireless MCU
JN5189(T)/JN5188(T)
Up to four GPIOs can be selected as pin interrupts (PINT), triggered by rising, falling or
both input edges.
Two GPIO grouped interrupts (GINT) enable an interrupt based on a logical (AND/OR)
combination of input states.
32-bit Real Time clock (RTC) with 1 s resolution. A timer in the RTC can be used to
wake from Sleep, Deep-sleep and Power-down, with 1 ms resolution
Voltage Brown Out with 8 programmable thresholds
8-input 12-bit ADC, 190 ksamples/s (Max.). HW support for continuous operation or
single conversions, single or multiple inputs can be sampled within a sequence. DMA
operation can be linked to achieve low overhead operation.
1 x analog comparator
Battery and temperature sensors
Watchdog timer and POR
Standby power controller
Up to 22 Digital IOs (DIO)
1 x Quad SPIFI for accessing an external flash device
Integrated NTAG I
2
C plus device, NFC Forum Type 2, on JN5189T and JN5188T only
Random Number Generator engine
AES engine AES-128 to 256
Hash hardware accelerator supporting SHA-1 and SHA-256
EFuse:
128-bit random AES key
Configuration modes
Trimming
ISO7816 smart card digital interface which with a suitable external analogue device
can operate as a smart card reader
2.4 Low power features
Sleep mode supported, the CPU in low power state waiting for interrupt
Deep-sleep mode supported, the CPU in low power state waiting for interrupt, but
extra functionality disabled or in low power state compared to sleep mode
Power Down mode, main functionality powered down, wakeup possible from IOs,
wakeup possible from some peripherals (I2C, USART, SPI) in a limited function mode
and low power timers
Deep -power down, very low power state with option of wake-up triggered by IOs, 350
nA
41-bit and 28-bit Low power timers can run in power down mode, clocked by 32 kHz
FRO or 32 kHz XTAL. Timers can run for over one year or 2 days
3. Applications
JN5189
Zigbee 3.0, Thread networks
Robust and secure Low-power wireless applications
Smart lighting, thermostats and home automation
Home security and access
Wireless sensor networks
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020-2021. All rights reserved.
Product data sheet
Rev. 1.3 — May 2021
3 of 92
NXP Semiconductors
IEEE 802.15.4 low power wireless MCU
JN5189(T)/JN5188(T)
4. Ordering information
Table 1.
Ordering information
Package
Name
JN5189HN
JN5189THN
JN5188HN
JN5188THN
Table 2.
JN5189HN
JN5189THN
JN5188HN
JN5188THN
320 KB
88 KB
Ordering information details
Type number
Flash size
640 KB
SRAM size
152 KB
NTAG
no
yes
no
yes
HVQFN40
Description
Version
Plastic thermal enhanced very thin quad
SOT618-1
flat package; no leads; 40 terminals; body
6
6
0.85 mm
Type number
5. Marking
Table 3.
JN5189HN
JN5189THN
JN5188HN
JN5188THN
Marking codes
Type number
Marking code
JN5189
JN5189T
JN5188
JN5188T
JN5189
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020-2021. All rights reserved.
Product data sheet
Rev. 1.3 — May 2021
4 of 92
NXP Semiconductors
IEEE 802.15.4 low power wireless MCU
JN5189(T)/JN5188(T)
6. Block diagram
Core
Cortex-M4
48 MHz
System
Watchdog timer
Memories
Flash
640/320 KB
SRAM
152/88 KB
Digital peripherals
2 × I
2
C
Serial wire debug
POR
2 × SPI
RF transceiver
IEEE 802.15.4
2011
Brown-out
detectors
Analog peripherals
12-bit ADC
8 channels
NFC Tag
(
JN5189T/JN5188T Only)
1 × Analog
comparator
2 × USART
DMA
Fast antenna
diversity
10 × PWM
Power
management
controller
1 × DMIC
Battery sensor
Clocks
32 MHz XTAL
oscillator
32.768 kHz XTAL
oscillator
Low frequency free
running oscillator
High frequency free
running oscillator
Temperature
sensor
Security
HASH
1 × QSPI
DC/DC converter
Up to 22 × GPIO
Timers
1 × IR modulator
2 × Counter/timer
1 × ISO7816
AES 128/256
Real time clock
Random number
generator
2 x Wakeup timers
Fig 1.
High level hardware block diagram
JN5189
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020-2021. All rights reserved.
Product data sheet
Rev. 1.3 — May 2021
5 of 92
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