Ordering Information .................................................................................................................................................................... 2
User Programming Interface ..................................................................................................................................... 18
Start-up output frequency and signaling types ........................................................................................................... 18
Any-frequency function ............................................................................................................................................. 19
C/SPI Control Registers...................................................................................................................................................... 28
9 I
Register Address: 0x00. DCO Frequency Control Least Significant Word (LSW) .................................................... 28
Register Address: 0x01. OE Control, DCO Frequency Control Most Significant Word (MSW) ................................. 29
Register Address: 0x02. DCO PULL RANGE CONTROL ........................................................................................ 29
Register Address: 0x03. Frac-N PLL Feedback Divider Integer Value and Frac-N PLL Feedback Divider Fraction
Value MSW ............................................................................................................................................................... 30
Register Address: 0x05. Forward Divider, Driver Control ......................................................................................... 30
Register Address: 0x06. Driver Divider, Driver Control ............................................................................................. 31
2
C Operation ........................................................................................................................................................................ 32
10 I
I
2
C protocol ............................................................................................................................................................... 32
I
2
C Timing Specification ............................................................................................................................................ 35
I
2
C Device Address Modes ....................................................................................................................................... 36
Dimensions and Patterns ........................................................................................................................................................... 43
Additional Information ................................................................................................................................................................ 44
Revision History ......................................................................................................................................................................... 45
Rev 1.01
Page 3 of 45
www.sitime.com
SiT3521
1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator
1 Electrical Characteristics
All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage with
standard output terminations shown in the termination diagrams. Typical values are at 25°C and nominal supply voltage.
Table 1. Electrical Characteristics – Common to LVPECL, LVDS and HCSL
Parameter
Output Frequency Range
Symbol
f
Min.
1
Typ.
–
–
–
–
–
±1
–
–
–
Max.
340
Unit
MHz
Condition
Factory or user programmable, accurate to 6 decimal places
Frequency Range
Frequency Stability
Frequency Stability
F_stab
-10
-20
-25
-50
First Year Aging
F_1y
–
+10
+20
+25
+50
–
ppm
ppm
ppm
ppm
ppm
°C
°C
°C
1
st
-year aging at 25°C
Inclusive of initial tolerance, operating temperature, rated
power supply voltage and load variations.
Temperature Range
Operating Temperature Range
T_use
-20
-40
-40
+70
+85
+105
Supply Voltage
Supply Voltage
Vdd
2.97
2.7
2.52
2.25
3.3
3.0
2.8
2.5
–
–
100
–
–
–
3.63
3.3
3.08
2.75
–
30%
–
V
V
V
V
Extended Commercial
Industrial
Extended Industrial. Available only for I
2
C operation, not SPI.
Input Characteristics – OE Pin
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
VIH
VIL
Z_in
70%
–
–
Vdd
Vdd
kΩ
OE pin
OE pin
OE pin, logic high or logic low
Output Characteristics
Duty Cycle
DC
45
–
–
55
%
Startup and Output Enable/Disable Timing
Start-up Time
Output Enable/Disable Time –
Hardware control via OE pin
Output Enable/Disable Time –
Software control via I
2
C/SPI
T_start
T_oe_hw
3.0
3.8
ms
µs
Measured from the time Vdd reaches its rated minimum value
Measured from the time OE pin reaches rated VIH and VIL to
the time clock pins reach 90% of swing and high-Z.
See
Figure 9
and
Figure 10
Measured from the time the last byte of command is
transmitted via I
2
C/SPI (reg1) to the time clock pins reach 90%
of swing and high-Z. See
Figure 30
and
Figure 31
T_oe_sw
–
–
6.5
µs
Rev 1.01
Page 4 of 45
www.sitime.com
SiT3521
1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator
Table 2. Electrical Characteristics – LVPECL Specific
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Current Consumption
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Idd
I_OE
I_leak
I_driver
–
–
–
–
–
–
0.15
–
89
58
–
32
mA
mA
A
mA
Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
Output Characteristics
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
VOH
VOL
V_Swing
Tr, Tf
Vdd - 1.1V
Vdd - 1.9V
1.2
–
–
–
1.6
225
Vdd - 0.7V
Vdd - 1.5V
2.0
290
Jitter
RMS Phase Jitter (random) –
DCO Mode Only
T_phj
–
–
RMS Phase Jitter (random) –
Any-frequency Mode Only
T_phj
–
–
RMS Period Jitter
[3]
Note:
3. Measured according to JESD65B.
T_jitt
–
0.225
0.1
0.225
0.11
1
0.340
0.14
0.340
0.15
1.6
ps
ps
ps
ps
ps
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3 V or 2.5 V
V
V
V
ps
See
Figure 5
See
Figure 5
See
Figure 6
20% to 80%, see
Figure 6
Table 3. Electrical Characteristics – LVDS Specific
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Current Consumption
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Idd
I_OE
I_leak
–
–
–
–
–
0.15
80
61
–
mA
mA
A
Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V
OE = Low
OE = Low
Output Characteristics
Differential Output Voltage
Delta VOD
Offset Voltage
Delta VOS
Rise/Fall Time
VOD
ΔVOD
VOS
ΔVOS
Tr, Tf
250
–
1.125
–
–
–
–
–
–
400
455
50
1.375
50
470
Jitter
RMS Phase Jitter (random) –
DCO Mode Only
T_phj
–
–
RMS Phase Jitter (random) –
Any-frequency Mode Only
T_phj
–
–
RMS Period Jitter
[4]
Note:
4. Measured according to JESD65B.
T_jitt
–
0.21
0.1
0.21
0.1
1
0.275
0.12
0.367
0.12
1.6
ps
ps
ps
ps
ps
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels
f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdd levels
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3 V or 2.5 V
mV
mV
V
mV
ps
f = 156.25MHz See
Figure 7
See
Figure 7
See
Figure 7
See
Figure 7
Measured with 2 pF capacitive loading to GND, 20% to 80%,
The surging 5G tide will bring important challenges to the RF front end. The mobile phone antenna will also face unprecedented tests after the arrival of 5G. From 4G to the current 5G, MIMO has gradua...
Ultrasonic ranging without interruptionTimerLoadSet(TIMER0_BASE,TIMER_A,SysCtlClockGet());//Initial value filled with 40000000 GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0x08);//Trigger signalSysCtlDel...
For us engineers, computers are essential work tools. We have installed various development environments, and there are still quite a few of them, but most of them need to be cracked (I have never use...
The PB compilation and generation system was normal before. I don't know why yesterday, I reported an error when I recompiled an old project. The content of build.err is as follows: [color=#FF0000]E:\...
Today's computer peripherals are pursuing high speed and high versatility. In order to meet user needs, seven companies led by Intel launched the USB (Universal Serial Bus) bus protocol in 1994, wh...[Details]
introduction
With the continuous optimization of surface mount technology (SMT) and the rapid development of chip component manufacturing technology, the application of chip mounters in the el...[Details]
1. Introduction
Automobile pollution is one of the most important issues that people are most concerned about and need to solve urgently. As an important method for detecting automobile exhau...[Details]
0 Introduction
With the development of my country's economy, the number of motor vehicles continues to increase. The growth of existing roads and other hardware facilities can no longer meet t...[Details]
0. Introduction
In daily life, we often see some special-purpose vehicles. When these vehicles pass through intersections, they often obtain the right of way at intersections by temporarily op...[Details]
1 Introduction
With the acceleration of the pace of urban modernization, society has higher requirements for urban road lighting and urban lighting projects. The state has clearly required tha...[Details]
To differentiate their products in a crowded and competitive market, manufacturers of handheld devices often consider battery life and power management as key selling points for cell phones, PDAs, ...[Details]
July 11, 2012, Beijing - Altera Corporation (NASDAQ: ALTR) today announced the launch of 40-Gbps Ethernet (40GbE) and 100-Gbps Ethernet (100GbE) intellectual property (IP) core products. These core...[Details]
The solidification and modularization of intelligent video analysis algorithms are the current trends in the application of intelligent video analysis technology. It perfectly combines intelligent ...[Details]
1 Introduction
Building Automation System (BAS) is a distributed monitoring system (DCS) designed according to distributed information and control theory. It is the result of the mutual de...[Details]
1 Introduction
With the development of control, computer, communication, network technology, etc., a new control technology, namely fieldbus, has emerged in the field of industrial control...[Details]
This week, Microsoft held its 2012 Microsoft Worldwide Partner Conference (WPC) in Toronto, Canada. At the conference, Microsoft showed its new products and services to partners around the world. A...[Details]
In the single-chip microcomputer system, in addition to display devices, sound devices are often used, and the most common sound device is the buzzer. Buzzers are generally used for some low-demand...[Details]
1. Proposal of
reconfigurable
measurement and control system
The measurement and control system generally refers to a system based on
computers
to realize data acquisition a...[Details]
Key Points
1. Now, in addition to high-end smartphones and tablets, users also expect to use touch screens in other applications, and they are gradually appearing in cars and instruments.
...[Details]
FPGA/CPLD
京公网安备 11010802033920号
EEWORLD
