Resistor values are typically 120 to 240 ohms for 3.3V opera on and 82 to 120 ohms for 2.5V
opera on.
Figure 7 - Pull Up Pull Down Termina on
Resistor values are typically for 3.3V opera on
For 2.5V opera on, the resistor to ground is 62 ohms and the resistor to supply is 240 ohms
There are numerous applica on notes on termina ng and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 6,
and a pull-up/pull-down scheme as shown in Figure 7. An AC coupling capacitor is op onal, depending on the applica on and the input logic requirements of
the next stage.
One of the most important considera ons is termina ng the Output and Complementary Outputs equally. An unused output should not be le un-
terminated, and if one of the two outputs is le open it will result in excessive ji er on both. PC board layout must take this and 50 ohm impedance matching
into account. Load matching and power supply noise are the main contributors to ji er related problems.
LVDS Applica on Diagrams
+3.3V
OE or NC
10nF
1nF
1
6
+3.3V
OE or NC
10nF
1nF
1
6
10nF
OE or NC
2
5
100
3
4
10nF
OE or NC
2
5
Receiver
100
Receiver
3
4
Figure 8 - LVDS to LVDS, internal 100Ω
Some LVDS structures have an internal 100 ohm resistor on the
input and do not need addi onal components.
Figure 9 - LVDS to LVDS, External 100Ω and AC block ing caps
One of the most important considera ons is termina ng the Output and Complementary Outputs equally. An unused output should not be le un-
terminated, and if one of the two outputs is le open it will result in excessive ji er on both. PC board layout must take this and 50 ohm impedance matching
into account. Load matching and power supply noise are the main contributors to ji er related problems.
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FPGA/CPLD
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