S3C49F9X SOLID DISK CONTROLLER
INRODUCTION
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PRODUCT OVERVIEW
Samsung's S3C49F9X is NAND flash memory controller which can control flash memories as solid state
disk. It provides PC Card ATA/IDE interface, host and flash transfer rates up to 20.0MB/S. S3C49F9X
can control flash memory maximum 10 pieces if use the 32M,64M,128M,512Mbit and can control flash
memory maximum 8 pieces if use the 1Gbit. The device is designed using 0.35-um CMOS process,
housed in a 100-TQFP package. It supports operation in both 5.0V and 3.3V.
An outstanding feature of the S3C49F9X flash disk controller is its CPU core: the ARM7TDMI 16/32-bit
RISC processor, designed by Advanced RISC Machine (ARM), Ltd. The ARM core is a low-power,
general purpose, microprocessor macro-cell that was developed for use in application-specific and
customer-specific intergrated circuit. It is simple, elegant, and fully static design is particularly suitable for
cost and power sensitive application
1.1 Features
- PC Card-ATA/True IDE/CompactFlash compatible host interface
- Automatic sensing of PC Card ATA and 68-pin IDE
- Included 256-byte CIS RAM
- Five PC Card ATA addressing modes
- Host data transfer rate : 20MB/S
- Flash data transfer rate : 10MB/S
- Host Interface : 8/16-bit Access
- Flash Interface : 8-bit Access
- Support 3 power save mode : stop/idle/active
- Support up to 10 flash memories
- Support 32/64/128/256/512Mbit,1Gbit NAND flash memory made by Samsung
NAND Flash Density
32Mb, 64Mb, 128Mb, 256Mb, 512Mb
1Gb
- Auto power down function
- ECC function
- Available 100-pin TQFP
- Operating Voltage : 3.3V to 5.0V
Min. / Max. Capacity (number of flash)
4MB / 512MB (Up to 10ea)
128MB/1GB (Up to 8ea)
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S3C49F9X SOLID DISK CONTROLLER
INRODUCTION
Microprocessor Architecture
- 16/32-bit RISC architecture
- Efficient and powerful ARM7TDMI CPU core
- Cost-effective JTAG based debug solution
Interrupts
- 8 interrupt sources
- Normal or fast interrupt modes (IRQ, FIQ)
System Manager
-
512-Kbyte
virtually
addressable
memory
PC-Card/ATA Interface
- Include 256-Bytes SRAM for CIS
- Support memory and I/O addressing mode
- Support True IDE mode
- 1-bit ECC
space
- Support 8/16-bit external bus for SRAM/ROM
-
Programmable external memory access time
-
Included 32-Kbytes internal ROM
- Included 8-Kbytes internal SRAM
DMA Controller
- Two-channel, general-purpose DMA controller
- Memory to memory, PCMCIA to/from memory
data transfers without CPU Intervention
- Support for 8/16-bit data transfers
- Increment or decrement of source or
destination address
Operating Voltage Range
- 3.3 to 5.0 volts
Programmable Timer
- 1-channel 16-bit programmable timer
Operating Frequency
- Up to 20MHz
Package Type
- 100-TQFP
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