EN23F0QI
15A Voltage Mode Synchronous Buck PWM
DC-DC Converter with Integrated Inductor
Description
The EN23F0QI is a Power System on a Chip
(PowerSoC) DC-DC converter. It integrates MOSFET
switches, small-signal control circuits, compensation
and an integrated inductor in an advanced
12x13x3mm QFN module. It offers high efficiency,
excellent line and load regulation. The EN23F0QI
operates over a wide input voltage range and is
specifically designed to meet the precise voltage and
fast transient requirements of high-performance
products. The EN23F0QI features frequency
synchronization to an external clock, power OK
output voltage monitor, programmable soft-start along
with thermal and over current protection. The device’s
advanced circuit design, ultra high switching
frequency and proprietary integrated inductor
technology delivers high-quality, ultra compact, non-
isolated DC-DC conversion.
The Enpirion solution significantly helps in system
design and productivity by offering greatly simplified
board
design,
layout
and
manufacturing
requirements. In addition, overall system level
reliability is improved given the small number of
components required with the Enpirion solution.
All Enpirion products are RoHS compliant and lead-
free manufacturing environment compatible.
Features
•
•
•
•
•
•
•
•
•
•
•
•
Integrated Inductor, MOSFETs, Controller
Total Solution Size Estimate 308mm
2
Wide Input Voltage Range: 4.5V – 14V
2% V
OUT
Accuracy (Over Line/Load/Temperature)
Master/Slave Configuration for Parallel Operation
o
Up to 4 Devices with 48A capability
Frequency Synchronization (External Clock)
Output Enable Pin and Power OK Signal
Programmable Soft-Start Time
Under Voltage Lockout Protection (UVLO)
Programmable Over Current Protection
Thermal Shutdown and Short Circuit Protection
RoHS compliant, MSL level 3, 260
o
C reflow
Applications
•
•
•
•
Space Constrained Applications
Distributed Power Architectures
Output Voltage Ripple Sensitive Applications
Beat Frequency Sensitive Applications
Servers, Embedded Computing Systems,
LAN/SAN Adapter Cards, RAID Storage Systems,
Industrial Automation, Test and Measurement,
and Telecommunications
•
Efficiency vs. Output Current
100
90
80
EFFICIENCY (%)
70
60
50
40
30
20
10
0
0
1
2
3
4 5 6 7 8 9 10 11 12 13 14 15
OUTPUT CURRENT (A)
VOUT = 3.3V
VOUT = 1.8V
VOUT = 1.2V
CONDITIONS
V
IN
= 12.0V
AVIN = 3.3V
Dual Supply
Figure 1.
Simplified Applications Circuit
(Footprint Optimized)
Figure 2.
Highest Efficiency in Smallest Solution Size
www.enpirion.com
EN23F0QI
Ordering Information
Part Number
EN23F0QI
EN23F0QI-E
Package Markings
EN23F0QI
EN23F0QI
Temp Rating (°C)
-40 to +85
Package Description
92-pin (12mm x 13mm x 3mm) QFN T&R
QFN Evaluation Board
Packing and Marking Information:
http://www.enpirion.com/resource-center-packing-and-marking-information.htm
Pin Assignments (Top View)
Figure 3:
Pin Out Diagram (Top View)
NOTE A:
NC pins are not to be electrically connected to each other or to any external signal, ground, or voltage.
However, they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or damage.
NOTE B:
Shaded area highlights exposed metal below the package that is not to be mechanically or electrically
connected to the PCB. Refer to Figure 14 for details.
NOTE C:
White ‘dot’ on top left is pin 1 indicator on top of the device package.
©Enpirion
2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com,
Page 2
EN23F0QI
Pin Description
I/O Legend:
P=Power
G=Ground
NC=No Connect
I=Input O=Output
I/O=Input/Output
PIN
1-24,
36, 81
25-35
37-39,
83-92
40-46
47-63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
NAME
NC
VOUT
NC(SW)
PGND
PVIN
AVINO
PG
BTMP
VDDB
BGND
S_IN
S_OUT
POK
ENABLE
AVIN
AGND
M/S
VFB
EAIN
SS
I/O
NC
O
NC
G
P
O
I/O
I/O
O
G
I
O
O
I
P
G
I
I/O
O
I/O
FUNCTION
NO CONNECT – These pins may be internally connected. Do not connect them to each
other or to any other electrical signal. Failure to follow this guideline may result in device
damage.
Regulated converter output. Connect these pins to the load and place output capacitor
between these pins and PGND pins 40-42.
NO CONNECT – These pins are internally connected to the common switching node of the
internal MOSFETs. They are not to be electrically connected to any external signal, ground,
or voltage. Failure to follow this guideline may result in damage to the device.
Input/Output power ground. Connect these pins to the ground electrode of the input and
output filter capacitors. See VOUT and PVIN pin descriptions for more details.
Input power supply. Connect to input power supply. Decouple with input capacitor to PGND
pins 43-46.
Internal 3.3V linear regulator output. Connect this pin to AVIN (Pin 73) for applications
where operation from a single input voltage (PVIN) is required. If AVINO is being used,
place a 1µF, X5R/X7R, capacitor between AVINO and AGND as close as possible to
AVINO.
Place a 0.1µF, X7R, capacitor between this pin and BTMP.
See pin 65 description.
Internal regulated voltage used for the internal control circuitry. Place a 1µF, X7R, capacitor
between this pin and BGND.
See pin 67 description.
Digital Input. This pin accepts either an input clock to phase lock the internal switching
frequency or a S_OUT signal from another EN23F0QI. Leave this pin floating if not used.
Digital Output. PWM signal is output on this pin. Leave this pin floating if not used.
Power OK is an open drain transistor (pulled up to AVIN or similar voltage) used for power
system state indication. POK is logic high when VOUT is -10% of VOUT nominal. Leave
this pin floating if not used.
Input Enable. Applying a logic high to this pin enables the output and initiates a soft-start.
Applying a logic Low disables the output. Do not leave this pin floating.
3.3V Input power supply for the controller. Place a 0.1µF, X7R, capacitor between AVIN
and AGND.
Analog Ground. This is the ground return for the controller. Needs to be connected to a
quiet ground.
A logic level low configures the device as Master and a logic level high configures the
device as a Slave. Connect to ground in standalone mode.
External Feedback Input. The feedback loop is closed through this pin. A voltage divider at
VOUT is used to set the output voltage. The mid-point of the divider is connected to VFB. A
phase lead capacitor from this pin to VOUT is also required to stabilize the loop.
Optional Error Amplifier Input. Allows for customization of the control loop for performance
optimization. Leave this pin floating if unused.
Soft-Start node. The soft-start capacitor is connected between this pin and AGND. The
value of this capacitor determines the startup time. See Soft-Start Operation in the
Functional Description section for details.
Programmable over-current protection. Placement of a resistor on this pin will adjust the
over-current protection threshold. See Table 2 for the recommended RCLX Value to set
OCP at the nominal value specified in the Electrical Characteristics table. No current limit
protection when this pin is left floating.
Adding a resistor (R
FS
) to this pin will adjust the switching frequency of the EN23F0QI. See
Table 1 for suggested resistor values on R
FS
for various PVIN/VOUT combinations to
maximize efficiency. Do not leave this pin floating.
Connect to GND plane at all times.
Not a perimeter pin. Device thermal pad to be connected to the system GND plane for heat-
sinking purposes.
79
RCLX
I/O
80
82
93
FADJ
CGND
PGND
I/O
G
G
©Enpirion
2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com,
Page 3
EN23F0QI
Absolute Maximum Ratings
CAUTION:
Absolute Maximum ratings are stress ratings only. Functional operation beyond the recommended operating
conditions is not implied. Stress beyond the absolute maximum ratings may impair device life. Exposure to absolute
maximum rated conditions for extended periods may affect device reliability.
PARAMETER
Voltages on : PVIN, VOUT
Pin Voltages – AVINO, AVIN, ENABLE, POK, S_IN, S_OUT, M/S
Pin Voltages – VFB, SS, EAIN, RCLX, FADJ
PVIN Slew Rate
Storage Temperature Range
Maximum Operating Junction Temperature
Reflow Temp, 10 Sec, MSL3 JEDEC J-STD-020A
ESD Rating (based on Human Body Model)
ESD Rating (based on CDM)
SYMBOL
MIN
-0.5
2.5
-0.5
0.3
MAX
15
6.0
2.75
3
150
150
260
2000
500
UNITS
V
V
V
V/ms
°C
°C
°C
V
V
T
STG
T
J-ABS Max
-65
Recommended Operating Conditions
PARAMETER
Input Voltage Range
AVIN: Controller Supply Voltage
Output Voltage Range (Note 1)
Output Current
Operating Ambient Temperature
Operating Junction Temperature
SYMBOL
PVIN
AVIN
V
OUT
I
OUT
T
A
T
J
MIN
4.5
2.5
0.75
-40
-40
MAX
14.0
5.5
3.3
15
+85
+125
UNITS
V
V
V
A
°C
°C
Thermal Characteristics
PARAMETER
Thermal Shutdown
Thermal Shutdown Hysteresis
Thermal Resistance: Junction to Ambient (0 LFM) (Note 2)
Thermal Resistance: Junction to Case (0 LFM)
SYMBOL
T
SD
T
SDH
θ
JA
θ
JC
TYP
160
35
13
1
UNITS
°C
°C
°C/W
°C/W
Note 1:
RCLX resistor value may need to be raised for V
OUT
> V
IN
– 2.5V to increase current limit threshold. Contact
techsupport@enpirion.com
for details.
Note 2:
Based on 2oz. external copper layers and proper thermal design in line with EIJ/JEDEC JESD51-7 standard for
high thermal conductivity boards.
©Enpirion
2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com,
Page 4
EN23F0QI
Electrical Characteristics
NOTE: V
IN
=12V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted.
Typical values are at T
A
= 25°C.
PARAMETER
Operating Input Voltage
Controller Input Voltage
PVIN Under Voltage
Lock-out
AVIN Under Voltage
Lock-out rising
AVIN Under Voltage
Lock-out falling
AVIN Pin Input Current
Internal Linear Regulator
Output Voltage
Shut-Down Supply
Current
Feedback Pin Voltage
SYMBOL
PVIN
AVIN
UVLO
PVIN
AVIN
UVLOR
AVIN
OVLOF
I
AVIN
AVINO
IPVIN
S
IAVIN
S
V
FB
TEST CONDITIONS
MIN
4.5
2.5
TYP
MAX
14.0
5.5
UNITS
V
V
V
V
V
mA
V
μA
μA
Voltage above which UVLO is not
asserted
Voltage above which UVLO is not
asserted
Voltage below which UVLO is
asserted
2
2.3
2.1
14
3.3
PVIN=12V, AVIN=3.3, ENABLE=0V
PVIN=12V, AVIN=3.3, ENABLE=0V
Feedback Node Voltage at:
V
IN
= 12V, ILOAD = 0, T
A
= 25°C
Feedback Node Voltage at:
4.5V
≤
V
IN
≤
14V
0A
≤
I
LOAD
≤
15A, T
A
= -40 to 85°C
VFB pin input leakage current
(Note 3)
C
SS
= 47nF
(Note 3, Note 4 and Note 5)
0.594
300
50
0.60
0.606
V
Feedback Pin Voltage
Feedback pin Input
Leakage Current
V
OUT
Rise Time
Soft Start Capacitor
Range
Continuous Output
Current
Over Current Trip Level
ENABLE Logic High
ENABLE Logic Low
ENABLE Lockout Time
ENABLE pin Input
Current
Switching Frequency
External SYNC Clock
Frequency Lock Range
S_IN Threshold – Low
S_IN Threshold – High
S_OUT Threshold – Low
S_OUT Threshold –
High
POK Lower Threshold
V
FB
I
FB
t
RISE
C
SS_RANGE
I
OUT_CONT
I
OCP
V
ENABLE_HIGH
V
ENABLE_LOW
T
ENLOCKOUT
I
ENABLE
F
SW
F
PLL_LOCK
V
S_IN_LO
V
S_IN_HI
V
S_OUT_LO
V
S_OUT_HI
POK
LT
0.588
-5
1.96
0.60
0.612
5
V
nA
ms
nF
2.8
47
3.64
0
Reference Table 3
4.5V
≤
V
IN
≤
14V;
4.5V
≤
V
IN
≤
14V;
1.8
0
8
180kΩ Pull Down (Note 3)
RFADJ =3kΩ
Range of SYNC clock frequency
S_IN Clock Logic Low Level
S_IN Clock Logic High Level
S_OUT Clock Logic Low Level
S_OUT Clock Logic High Level
Percentage of Nominal Output
Voltage for POK to be Low
Enpirion Confidential
1.8
90
1.8
0.8
4
1.0
22.5
15
A
A
AV
IN
0.6
V
V
ms
μA
MHz
1.6
0.8
2.5
0.8
2.5
MHz
V
V
V
V
%
©Enpirion
2012 all rights reserved, E&OE
www.enpirion.com,
Page 5
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