OPENLPPOL-EVB datasheet, PDF - EEWORLD Datasheet

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OPENLPPOL-EVB: Descriptionpower management IC development tools eval board open loop point-of-load; CategoryDevelopment board/suite/development tools; File Size364KB，36 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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OPENLPPOL-EVB Overview

power management IC development tools eval board open loop point-of-load

OPENLPPOL-EVB Parametric

Parameter Name	Attribute value
Manufacture	Silicon Laboratories
Product Category	Power Management IC Development Tools
RoHS	Yes
Produc	Evaluation Boards
Type	Motor / Motion Controllers & Drivers
Tool Is For Evaluation Of	Si8234, Si8512, Si8540
Input Voltage	12 V
Output Voltage	6 V
Description/Functi	Open Loop Point of Load
Output Curre	10 A
Unit Weigh	50 mg

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Si85xx

Si85

N ID I R E C TI ON A L

AC C

URRENT

ENSORS

Features



Single-chip ac current sensor

Low loss: <1.3 m primary series

resistance and <2 nH inductance

Leading-edge noise suppression

eliminates need for leading-edge

blanking

"Ping-Pong" output version allows

one Si85xx to replace two current

transformers in full-bridge designs

5, 10, and 20 A full-scale versions

±5% initial accuracy



50 kHz to 1 MHz input frequency

range

FAULT output to safeguard operation

Large 2 V

min output at full scale

High-side or low-side current sensing

Compact 4x4x1 mm QFN package

(1 kV

RMS

isolation)

20-pin wide-body SOIC

(5 kV

RMS

isolation)

–40 to 125 °C operating range

UL/VDE/CSA approval

Applications



Power supplies

Motor controls



Lighting equipment

Industrial equipment

Description

The Si85xx products are unidirectional ac current sensors available in full-scale

ranges of 5, 10, and 20 A. Si85xx products are ideal upgrades for older current-

sensing technologies offering size, performance, and cost advantages over current

transformers, Hall effect devices, DCR circuits, and other approaches. The Si85xx

are extremely low-loss, adding less than 1.3 m of series resistance and less than

2 nH series inductance in the sensing path at 25 °C. Current-sensing terminals are

isolated from the other package pins, providing up to 5 kV

RMS

isolation level per

safety approval ratings.

Ordering Information:

See page 26.

Pin Assignments:

See page 24

20-Pin SOIC

VDD

MODE

OUT1

OUT2

TRST/FAULT

GND

IIN

Safety Approval (20-Pin SOIC Only)



UL 1577 recognized



5000 V

RMS

for 1 minute



CSA component notice 5A approval



IEC 60950, 61010, 60601

approved



VDE certification conformity



IEC 60747-5-2 (VDE0884 Part 2)

Si851x

IIN

IOUT

Functional Block Diagram

12-Pin QFN

MODE

IIN

Si851x

RESET LOGIC

MODE LOGIC

MODE

VDD

VIN

VDD1

TRST

OUT

VDD

IIN

GND1

Si850x

IOUT

OUT1

OUT2

Si851x

IOUT

TRST/FAULT

GND

METAL SLUG

INTEGRATOR

SIGNAL CONDITIONING

OUT2

GND2

PH1

PH2

VOUT

TEMP

SENSOR

ADC

AUTO CALIBRATION

LOGIC

Typical Application

IOUT

GND

VDD

TRST/FAULT

Patents pending

Si85xx

Preliminary Rev. 0.4 6/12

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

Si85xx

ABLE

Section

ONTENTS

Page

1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

2. Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

2.1. Under Voltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.2. Device Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

2.3. Integrator Reset and Current Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.4. Total Measurement Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

2.5. Effect of Temperature on Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.6. Leading Edge Noise Suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.7. FAULT Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.8. Safe Operating Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3. Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1. Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

3.2. Layout Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.3. Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

3.4. Single-Phase Buck Converter Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.5. Full-Bridge Converter Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.6. Push-Pull Converter Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

4. Pin Descriptions—12-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

5. Pin Descriptions—20-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

7. Package Outline—12-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

8. Recommended PCB Land Pattern (12-Pin QFN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

9. Package Outline: Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

10. Recommended PCB Land Pattern (20-Pin SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

11. Top Marking (QFN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

12. Top Marking (SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

Preliminary Rev. 0.4

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