Designing With Logic
SDYA009C
June 1997
1
IMPORTANT NOTICE
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Copyright
©
1997, Texas Instruments Incorporated
2
Contents
Title
Page
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Behavior With the Supply Voltage Reduced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Behavior With the Supply Voltage Switched Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1 Bipolar Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.2 CMOS Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Behavior With Low Supply Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Supply Voltages Partially Switched Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 Changing Powered-Up Subsystems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1
1
3
3
4
6
3 Unused Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Excessive Input Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5 Transition Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6 Propagation Delay Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1 Propagation Delay Times With Several Outputs Switching Simultaneously . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2 Propagation Delay Times With Negative Undershooting at the Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3 Propagation Delay Times With Large Capacitive Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4 Input and Output Capacitances of Digital Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
12
14
15
18
7 Bus Contention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8 Backdriving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Acknowledgment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
List of Illustrations
Figure
1
2
3
4
5
6
7
8
9
10
11
Title
Page
Input Circuit of a Bipolar Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Device Output From SN74 Family (Standard TTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Output of Schottky TTL Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3-State Output of Schottky TTL Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Diode Paths in CMOS Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Behavior of a TTL Device at Low Supply Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Feeding Back With CMOS Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Ideas for Protecting CMOS Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Interconnection of Unused Inputs With AND and OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Fixed Potential Connected to Unused Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Series Resistor Connected to Unused Inputs of Multiple-Emitter Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Widebus is a trademark of Texas Instruments Incorporated.
iii
List of Illustrations (continued)
Figure
12
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20
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Title
Page
Parasitic Transistors in CMOS Input Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Parasitic Transistors in Bipolar Input Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Setup for Generating an Undershoot Pulse (I = –60 mA, t = 100 ns) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Definition of Signal Amplitude and Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Two-Stage Shift Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Incorrect Operation of a Shift Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Inductances in the Lines Supplying a Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Increase of the Delay Time When Several Outputs Are Switched Simultaneously . . . . . . . . . . . . . . . . . . . . . . . . . 13
Increase of the Propagation Delay Time With a Widebus™ Circuit (74AC16240) . . . . . . . . . . . . . . . . . . . . . . . . . 14
Currents in the Output Stage of a Bus Driver With Negative Undershoot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Waveforms for Various Line Lengths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Bipolar Output Stage With Output Characteristics at a High Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Waveform at SN74LS00 Output (C
L
= 10 pF, 56 pF, and 616 pF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Determining the Short-Circuit Current With Bus Contention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
ABT Output-Stage Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Bus Supervision During Power On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Feeding Test Signals Into a Node Test Point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Low-Logic-Level Output Characteristics of SN74AS645 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Thermal Resistances in a Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Device Thermal Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
List of Tables
Table
1
2
3
4
5
Title
Page
Required Minimum Input Rise/Fall Rates for Logic Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Short-Circuit Current and Internal Resistance of Logic Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Capacitances of Digital Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Output-Stage Conditions During Bus Contention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Thermal Resistance of Plastic Packages in Still Air . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
iv
Abstract
Data sheets, which usually give information on device behavior only under recommended operating conditions, may only
partially answer engineering questions that arise during the development of systems using logic devices. However, information
is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:
“How does a bus driver behave with reduced (or even switched-off) supply voltage?” or “How does the delay time of a gate
with a large capacitive load change?” or “What must be considered when using
backdriving?”.
This report gives information on a number of questions that frequently arise. In addition, it provides examples that explain
phenomena that the designer should be aware of when using devices outside their recommended operating conditions.
1 Introduction
The function and behavior of digital logic devices are described fully in data sheets. Most questions regarding the behavior
of the device that arise when developing a system can be answered with the information given. However, the devices might
be operated under conditions not covered by the data sheet. This report addresses this issue and provides information on the
behavior of devices under such conditions.
Many parameter values in data sheets are not measured when the circuits are tested. The information is based on typical values
that have been established experimentally and that are applicable to the majority of devices of the same type or family. In
individual cases it might be necessary to interpret data and make measurements to accurately forecast the behavior of the
complete system.
2 Behavior With the Supply Voltage Reduced
Although not specifically mentioned in data sheets, additional components, some of them parasitic, influence operational
characteristics of devices. These components can affect the function of a system if the devices are not operated within the
recommended operating conditions. For example, large systems often require that parts of the system be shut down while other
parts continue to operate. Frequent problems occur at the interfaces between subsystems, which are operated with different
supply voltages, or whose supply voltages are switched off. This section describes the behavior of digital circuits operated with
low supply voltages.
2.1 Behavior With the Supply Voltage Switched Off
Because many circuits can be used with the various logic families, no general rule applies to the behavior of systems with supply
voltages switched off. For this reason, only the most important circuits and their behavior are discussed.
2.1.1 Bipolar Circuits
Figure 1 shows the simplified circuit of a TTL device with diode inputs, such as are used with devices in the SN74LS
(low-power Schottky TTL) logic family. However, the following comments apply to all other bipolar logic families.
VCC
R1
D2
Input
D1
Figure 1. Input Circuit of a Bipolar Device
1
Analog electronics
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