XC6105B616 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > XC6105B616

Preview

XC6105B616: DescriptionCMOS Voltage Detector; File Size519KB，26 Pages; Manufacturer

Download Datasheet View All

XC6105B616 Overview

CMOS Voltage Detector

Preview

Download Datasheet

View All

Preliminary

◆CMOS

Voltage Detector

◆Manual

Reset Input

◆Watchdog

Functions

◆Built-in

Delay Circuit

◆Detect

Voltage Range: 1.6~5.0V, ± 2%

◆Reset

Function is Selectable

DFL

(Low When Detected)

DFH

(High When Detected)

■APPLICATIONS

●Microprocessor

reset circuits

●Memory

battery backup circuits

●System

power-on reset circuits

●Power

failure detection

■GENERAL

DESCRIPTION

■FEATURES

Detect Voltage Range

Hysteresis Range

: 1.6V ~ 5.0V, +2%

(100mV increments)

: V

x 5%, TYP.

(XC6101~XC6107)

x 0.1%, TYP.

(XC6111~XC6117)

: 1.0V ~ 6.0V

The XC6101~XC6107, XC6111~XC6117 series are

groups of high-precision, low current consumption voltage

detectors with manual reset input function and watchdog

functions incorporating CMOS process technology. The

series consist of a reference voltage source, delay circuit,

comparator, and output driver.

With the built-in delay circuit, the XC6101 ~ XC6107,

XC6111 ~ XC6117 series’ ICs do not require any external

components to output signals with release delay time.

Moreover, with the manual reset function, reset can be

asserted at any time. The ICs produce two types of

output; V

DFL

(low when detected) and V

DFH

(high when

detected).

With the XC6101 ~ XC6105, XC6111 ~ XC6115 series’

ICs, the WD pin can be left open if the watchdog function

is not used.

Whenever the watchdog pin is opened, the internal

counter clears before the watchdog timeout occurs.

Since the manual reset pin is internally pulled up to the V

pin voltage level, the ICs can be used with the manual

reset pin left unconnected if the pin is unused.

The detect voltages are internally fixed 1.6V ~ 5.0V in

increments of 100mV, using laser trimming technology.

Six watchdog timeout period settings are available in a

range from 6.25msec to 1.6sec.

Seven release delay time 1 are available in a range from

3.13msec to 1.6sec.

Operating Voltage Range

Detect Voltage Temperature

Characteristics

: +100ppm/

C (TYP.)

Output Configuration

: N-channel open drain,

CMOS

Watchdog Pin

: Watchdog input

If watchdog input maintains

‘H’ or ‘L’ within the watchdog

timeout period, a reset signal

is output to the RESET

output pin

Manual Reset Pin

: When driven ‘H’ to ‘L’ level

signal, the MRB pin voltage

asserts forced reset on the

output pin.

Release Delay Time

: 1.6sec, 400msec, 200msec,

100msec, 50msec, 25msec,

3.13msec (TYP.) can be

selectable.

Watchdog Timeout Period

: 1.6sec, 400msec, 200msec,

100msec, 50msec,

6.25msec (TYP.) can be

selectable.

■TYPICAL

APPLICATION CIRCUIT

■TYPICAL

PERFORMANCE

CHARACTERISTICS

●Supply

Current vs. Input Voltage

XC61X1~XC61X5 (2.7V)

Supply Current:

ISS (µA)

Input Voltage:

VIN (V)

Ta=-40

℃

Ta=25

℃

Ta=85

℃

* Not necessary with CMOS output products.

* ‘x’ represents both ‘0’ and ‘1’. (ex. XC61x1⇒XC6101 and XC6111)

XC6101_07_XC6111_17 ETR0207_009

1/26

Recommended Resources

BBC engine circuit diagram

Adopting negative feedback broadband amplifier circuit

Active power meter circuit

Simple sensitive head circuit diagram

Universal inverter deceleration braking circuit

555 water full indicator circuit

Small problems with several evc dialog boxes: I would like to ask, when I press F1 to return to the previous window, or destroy the current window, to display another window, how should I write such code? if(pMsg->message == WM_KEYDOWN) { CChanne...; ggch Embedded System

IEEE754 floating point format: The C2000 microprocessor with C28x+FPU architecture adds some registers and instructions to the original C28x fixed-point CPU to support IEEE single-precision floating-point operations. For programs w...; 灞波儿奔 DSP and ARM Processors

If you use a microcontroller to power on and configure the FPGA~~: If I use a microcontroller to power on and configure the FPGA~~1. I use Quartus II 8.1 (32-Bit) to compile and generate a .POF file. How do I convert it to a file A that can be used to configure the m...; wanggq FPGA/CPLD

What type of angle sensor do you use? Please help me~~: [i=s] This post was last edited by paulhyde on 2014-9-15 03:30 [/i] What type of angle sensor do you use? I use MMA7361, which is difficult to use. I have to calculate the angle myself, and I can't fi...; 741070398 Electronics Design Contest

I would like to ask an expert about two questions about file filter drivers: 1. About the relationship between driver layering and filter driver. I have never been able to figure out the difference between driver layering and filter driver. My current understanding is: for fil...; Horace88 Embedded System

The Strongest ID Selection——Have fun with EEWORLD!: [b][size=6][color=navy]Select the strongest ID in history! [/color][/size][/b] [b][size=6][color=#000080][/color][/size][/b] Event time: [b]February 1st to February 28th[/b] Event content: 1. Netizens...; EEWORLD社区 Talking

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components