K8S5415EBB-SC1DT datasheet, PDF

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K8S5415EBB-SC1DT: DescriptionFlash Memory; Categorystorage storage; File Size1MB，65 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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K8S5415EBB-SC1DT Overview

Flash Memory

K8S5415EBB-SC1DT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	113339837
package instruction	,
Reach Compliance Code	compliant
ECCN code	EAR99
YTEOL	2

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Rev. 1.0, Nov. 2010

K8S5615ETC

256Mb C-die NOR Flash

44FBGA, Muxed Burst, Multi Bank SLC

16M x16, 1.7V ~ 1.95V

datasheet

SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND

SPECIFICATIONS WITHOUT NOTICE.

Products and specifications discussed herein are for reference purposes only. All information discussed

herein is provided on an "AS IS" basis, without warranties of any kind.

This document and all information discussed herein remain the sole and exclusive property of Samsung

Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property

right is granted by one party to the other party under this document, by implication, estoppel or other-

wise.

Samsung products are not intended for use in life support, critical care, medical, safety equipment, or

similar applications where product failure could result in loss of life or personal or physical harm, or any

military or defense application, or any governmental procurement to which special terms or provisions

may apply.

For updates or additional information about Samsung products, contact your nearest Samsung office.

All brand names, trademarks and registered trademarks belong to their respective owners.

ⓒ

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K8S5615ETC

256Mb C-die NOR Flash 1

datasheet

NOR FLASH MEMORY

Rev. 1.0

1.0 FEATURES................................................................................................................................................................. 5

2.0 GENERAL DESCRIPTION ......................................................................................................................................... 5

3.0 PIN DESCRIPTION .................................................................................................................................................... 5

4.0 44Ball FBGA TOP VIEW (BALL DOWN) .................................................................................................................... 6

5.0 FUNCTIONAL BLOCK DIAGRAM .............................................................................................................................. 7

6.0 ORDERING INFORMATION ...................................................................................................................................... 8

7.0 PRODUCT INTRODUCTION...................................................................................................................................... 11

8.0 COMMAND DEFINITIONS ......................................................................................................................................... 12

9.0 DEVICE OPERATION ................................................................................................................................................ 14

9.1 Read Mode .............................................................................................................................................................. 14

9.1.1 Asynchronous Read Mode................................................................................................................................ 14

9.1.2 Synchronous (Burst) Read Mode...................................................................................................................... 14

9.1.3 Continuous Linear Burst Read .......................................................................................................................... 14

9.2 Programmable Wait State ....................................................................................................................................... 15

9.3 Handshaking............................................................................................................................................................ 15

9.4 Set Burst Mode Configuration Register ................................................................................................................... 15

9.4.1 Programmable Wait State Configuration........................................................................................................... 15

9.4.2 Burst Read Mode Setting .................................................................................................................................. 15

9.4.3 RDY Configuration ............................................................................................................................................ 15

9.5 Autoselect Mode...................................................................................................................................................... 17

9.6 Standby Mode ......................................................................................................................................................... 17

9.7 Automatic Sleep Mode ............................................................................................................................................ 17

9.8 Output Disable Mode ............................................................................................................................................... 17

9.9 Block Protection & Unprotection.............................................................................................................................. 17

9.10 Hardware Reset..................................................................................................................................................... 17

9.11 Software Reset ...................................................................................................................................................... 18

9.12 Program ................................................................................................................................................................. 18

9.13 Accelerated Program ............................................................................................................................................. 18

9.14 Write Buffer Programming ..................................................................................................................................... 18

9.15 Accelerated Write Buffer Programming ................................................................................................................. 19

9.16 Chip Erase ............................................................................................................................................................. 19

9.17 Block Erase ........................................................................................................................................................... 19

9.18 Unlock Bypass....................................................................................................................................................... 19

9.19 Erase Suspend / Resume...................................................................................................................................... 20

9.20 Program Suspend / Resume ................................................................................................................................. 20

9.21 Read While Write Operation .................................................................................................................................. 20

9.22 OTP Block Region ................................................................................................................................................. 20

9.23 Low VCC Write Inhibit ........................................................................................................................................... 20

9.24 Write Pulse “Glitch” Protection .............................................................................................................................. 21

9.25 Logical Inhibit......................................................................................................................................................... 21

10.0 FLASH MEMORY STATUS FLAGS ......................................................................................................................... 22

11.0 Deep Power Down .................................................................................................................................................... 24

12.0 Common Flash Memory Interface............................................................................................................................. 25

13.0 ABSOLUTE MAXIMUM RATINGS

..................................................................................................................... 27

14.0 RECOMMENDED OPERATING CONDITIONS ( Voltage reference to GND )......................................................... 27

15.0 DC CHARACTERISTICS...................................................................................................................................

16.0 CAPACITANCE (TA = 25 °C, VCC = 1.8V, f = 1.0MHz)........................................................................................... 30

17.0 AC TEST CONDITION

...................................................................................................................................... 30

18.0 AC CHARACTERISTICS .......................................................................................................................................... 30

18.1 Synchronous/Burst Read.................................................................................................................................30

18.2 Asynchronous Read

........................................................................................................................................34

18.3 Hardware Reset(RESET) ...................................................................................................................................... 36

18.4 Erase/Program Operation...................................................................................................................................... 37

18.5 Erase/Program Performance

...........................................................................................................................38

-3-

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