KM68V512A, KM68U512A Family
Document Title
64Kx8 bit Low Power and Low Voltage CMOS Static RAM
CMOS SRAM
Revision History
Revision No.
0.0
0.1
History
Design target
Initial draft
- One datasheet for commercial, extended and industrial product.
- Add 85ns part on KM68V512A Family.
Finalize
Revise
- Add 32-sTSOP type package on product.
Revise
- Change datasheet format
- Improve power dissipation 0.7 to 1.0W
Draft Data
January 17, 1996
April 15, 1996
Remark
Advance
Preliminary
1.0
2.0
June 17, 1996
September 10, 1996
Final
Final
3.0
February 12, 1998
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 3.0
February 1998
KM68V512A, KM68U512A Family
64Kx8 bit Low Power and Low Voltage CMOS Static RAM
FEATURES
•
Process Technology : Poly Load
•
Organization : 64Kx8
•
Power Supply Voltage
KM68V512A family : 2.7~3.3V
KM68U512A family : 3.0~3.3V
•
Low Data Retention Voltage : 2V(Min)
•
Three state output and TTL Compatible
•
Package Type : 32-SOP-525, 32-TSOP1-0820F,
32-TSOP1-0813.4F
CMOS SRAM
GENERAL DESCRIPTION
The KM68V512A and KM68U512A families are fabricated
by SAMSUNG′s advanced CMOS process technology. The
families support various operating temperature ranges and
have various package types for user flexibility of system
design. The family also support low data retention voltage for
battery back-up operation with low data retention current.
PRODUCT FAMILY
Product Family
KM68V512AL-L
KM68U512AL-L
KM68V512ALE-L
KM68U512ALE-L
KM68V512ALI-L
KM68U512ALI-L
1. The parameter is measured with 30pF test load.
Operating
Temperature
Power Dissipation
V
CC
Range
3.0 ~ 3.6V
2.7 ~ 3.3V
Speed(ns)
70
1)
/85/100
85
1)
/100
70
1)
/85/100
85
1)
/100
70
1)
/85/100
85
1)
/100
Standby
(Isb
1
, Max)
10µA
10µA
20µA
15µA
20µA
15µA
40mA
32-SOP
32-TSOP1-F
32-sTSOP1-F
Operating
(Icc
2
, Max)
PKG Type
Commercial(0~70°C)
Extended(-25~85°C)
3.0 ~ 3.6V
2.7 ~ 3.3V
Industrial (-40~85°C)
3.0 ~ 3.6V
2.7 ~ 3.3V
PIN DESCRIPTION
N.C
N.C
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
CS2
WE
A13
A8
A9
A11
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
A11
A9
A8
A13
WE
CS2
A15
VCC
N.C
N.C
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
A3
A11
A9
A8
A13
WE
CS2
A15
VCC
N.C
N.C
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
A3
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Precharge circuit.
32-TSOP
Type1 - Forward
(8mm x 20mm)
A4
A5
A6
A7
A8
A12
A13
A14
A15
Row
select
32-SOP
Memory array
512 rows
128×8 columns
32-sTSOP
Type1 - Forward
(8mm x 13.4mm)
I/O
1
I/O
8
Data
cont
I/O Circuit
Column select
Data
cont
Name Name
CS
1
,CS
2
OE
WE
A
0
~A
15
I/O
1
~I/O
8
Vcc
Vss
N.C
Function
Chip Select Inputs
Output Enable Input
Write Enable Input
Address Inputs
Data Inputs/Outputs
Power
Ground
No Connection
CS1
CS2
WE
OE
A0
A1
A2
A3 A9 A10 A11
Control
logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 3.0
February 1998
KM68V512A, KM68U512A Family
PRODUCT LIST
Commercial Temperature Products
(0~70°C)
Part Name
KM68V512ALG-7L
KM68V512ALG-8L
KM68V512ALG-10L
KM68V512ALT-7L
KM68V512ALT-8L
KM68V512ALT-10L
KM68V512ALTG-7L
KM68V512ALTG-8L
KM68V512ALTG-10L
KM68U512ALG-8L
KM68U512ALG-10L
KM68U512ALT-8L
KM68U512ALT-10L
KM68U512ALTG-8L
KM68U512ALTG-10L
CMOS SRAM
Industrial Temperature Products
(-40~85°C)
Part Name
KM68V512ALGI-7L
KM68V512ALGI-8L
KM68V512ALGI-10L
KM68V512ALTI-7L
KM68V512ALTI-8L
KM68V512ALTI-10L
KM68V512ALTGI-7L
KM68V512ALTGI-8L
KM68V512ALTGI-10L
KM68U512ALGI-8L
KM68U512ALGI-10L
KM68U512ALTI-8L
KM68U512ALTI-10L
KM68U512ALTGI-8L
KM68U512ALTGI-10L
Extended Temperature Products
(-25~85°C)
Part Name
KM68V512ALGE-7L
KM68V512ALGE-8L
KM68V512ALGE-10L
KM68V512ALTE-7L
KM68V512ALTE-8L
KM68V512ALTE-10L
KM68V512ALTGE-7L
KM68V512ALTGE-8L
KM68V512ALTGE-10L
KM68U512ALGE-8L
KM68U512ALGE-10L
KM68U512ALTE-8L
KM68U512ALTE-10L
KM68U512ALTGE-8L
KM68U512ALTGE-10L
Function
32-SOP, 70ns, 3.3V, LL
32-SOP, 85ns, 3.3V, LL
32-SOP, 100ns, 3.3V, LL
32-TSOP F, 70ns, 3.3V, LL
32-TSOP F, 85ns, 3.3V, LL
32-TSOP F, 100ns, 3.3V,LL
Function
32-SOP, 70ns, 3.3V, LL
32-SOP, 85ns, 3.3V, LL
32-SOP, 100ns, 3.3V, LL
32-TSOP F, 70ns, 3.3V, LL
32-TSOP F, 85ns, 3.3V, LL
32-TSOP F, 100ns, 3.3V,LL
32-sTSOP F,70ns,3.3V,LL
Function
32-SOP, 70ns, 3.3V, LL
32-SOP, 85ns, 3.3V, LL
32-SOP, 100ns, 3.3V, LL
32-TSOP F, 70ns, 3.3V, LL
32-TSOP F, 85ns, 3.3V, LL
32-TSOP F, 100ns, 3.3V,LL
32-sTSOP F,70ns,3.3V,LL
32-sTSOP F,70ns,3.3V,LL
32-sTSOP F,85ns,3.3V,LL
32-sTSOP F,100ns,3.3V,LL
32-SOP, 85ns, 3.0V, LL
32-SOP, 100ns, 3.0V, LL
32-TSOP F, 85ns, 3.0V, LL
32-TSOP F, 100ns, 3.0V, LL
32-sTSOP F, 85ns, 3.0V, LL
32-sTSOP F, 100ns,3.0V, LL
32-sTSOP F,85ns,3.3V,LL
32-sTSOP F,100ns,3.3V,LL
32-SOP, 85ns, 3.0V, LL
32-SOP, 100ns, 3.0V, LL
32-TSOP F, 85ns, 3.0V, LL
32-TSOP F, 100ns, 3.0V, LL
32-sTSOP F, 85ns, 3.0V, LL
32-sTSOP F, 100ns,3.0V, LL
32-sTSOP F,85ns,3.3V,LL
32-sTSOP F,100ns,3.3V,LL
32-SOP, 85ns, 3.0V, LL
32-SOP, 100ns, 3.0V, LL
32-TSOP F, 85ns, 3.0V, LL
32-TSOP F, 100ns, 3.0V, LL
32-sTSOP F, 85ns, 3.0V, LL
32-sTSOP F, 100ns,3.0V, LL
FUNCTIONAL DESCRIPTION
CS
1
H
X
1)
L
L
L
CS
2
X
1)
L
H
H
H
OE
X
1)
X
1)
H
L
X
1)
WE
X
1)
X
1)
H
H
L
I/O
High-Z
High-Z
High-Z
Dout
Din
Mode
Deselected
Deselected
Output Disabled
Read
Write
Power
Standby
Standby
Active
Active
Active
1. X means don′t care(Must be low or high state.)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to
Power Dissipation
Storage temperature
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
Ratings
-0.5 to V
CC
+0.5
-0.3 to 4.6
1.0
-65 to 150
0 to 70
Operating Temperature
T
A
-25 to 85
-40 to 85
Soldering temperature and time
T
SOLDER
260°C, 10sec (Lead Only)
Unit
V
V
W
°C
°C
°C
°C
-
Remark
-
-
-
-
KM68V512AL-L, KM68U512AL-L
KM68V512ALE-L, KM68U512ALE-L
KM68V512ALI-L, KM68U512ALI-L
-
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3
Revision 3.0
February 1998
KM68V512A, KM68U512A Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Product
KM68V512A Family
KM68U512A Family
All Family
KM68V512A, KM68U512A Family
KM68V512A, KM68U512A Family
Min
3.0
2.7
0
2.2
-0.3
3)
Typ
3.3
3.0
0
-
-
CMOS SRAM
Max
3.6
3.3
0
Vcc+0.3V
2)
0.4
Unit
V
V
V
V
V
Note:
1. Commercial Product : T
A
=0 to 70°C, otherwise specified
Extended Product : T
A
=-25 to 85°C, otherwise specified
Industrial Product : T
A
=-40 to 85°C, otherwise specified
2. Overshoot : V
CC
+3.0V in case of pulse width≤30ns
3. Undershoot : -3.0V in case of pulse width≤30ns
4. Overshoot and undershoot are sampled, not 100% tested
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
6
8
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply current
Symbol
I
LI
I
LO
I
CC
I
CC1
Average operating current
I
CC2
Output low voltage
Output high voltage
Standby Current(TTL)
V
OL
V
OH
I
SB
Cycle time=Min, 100% duty, I
IO
=0mA
CS
1
=V
IL
, CS
2
=V
IH
, V
IN
=V
IL
or V
IH
I
OL
=2.1mA
I
OH
=-1.0mA
CS
1
=V
IH
, CS
2
=V
IL
, Other inputs=V
IL
or V
IH
KM68V512AL-L
CS
1
≥Vcc-0.2V,
CS
2
≥Vcc-0.2V,
or
CS
2
≤0.2V
,
Other inputs=0~Vcc
KM68V512ALE-L
KM68V512ALI-L
KM68U512AL-L
KM68U512ALE-L
KM68U512ALI-L
-
-
2.4
-
-
-
-
-
-
-
-
-
-
-
-
-
40
0.4
-
0.3
10
20
10
15
mA
V
V
mA
µA
µA
µA
µA
V
IN
=Vss to Vcc
CS
1
=V
IH
or CS
2
=V
IL
or OE=V
IH
or WE=V
IL
, V
IO
=Vss to Vcc
I
IO
=0mA, CS
1
=V
IL
, CS
2
=V
IH,
V
IN
=V
IH
or V
IL
Cycle time=1µs, 100% duty, I
IO
=0mA,
CS
1
≤0.2V,
CS
2
≥Vcc-0.2V,
V
IN
≤0.2V
or V
IN
≥Vcc-0.2V
Test Conditions
Min
-1
-1
-
-
Typ
-
-
-
-
Max
1
1
5
5
Unit
µA
µA
mA
mA
Standby Current(CMOS)
I
SB1
4
Revision 3.0
February 1998
KM68V512A, KM68U512A Family
AC OPERATING CONDITIONS
TEST CONDITIONS
( Test Load and Input/Output Reference)
Input pulse level : 0.4 to 2.2V
Input rising and falling time : 5ns
Input and output reference voltage :1.5V
Output load(see right) : C
L
=100pF+1TTL
1)
C
L
=30pF+1TTL
1. KM68V512AL-7L Family, KM68U512AL-8L Family
CMOS SRAM
C
L
1)
1. Including scope and jig capacitance
AC CHARACTERISTICS
(KM68V512B Family:Vcc=3.0~3.6V, KM68U512B Family:Vcc=2.7~3.3V,
Commercial product:T
A
=0 to 70°C, Extended product:T
A
=-25 to 85°C, Industrial product:T
A
=-40 to 85°C)
Speed Bins
Parameter List
Symbol
Min
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Read
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
70
-
-
-
10
5
0
0
10
70
60
0
60
55
0
0
30
0
5
70ns
Max
-
70
70
35
-
-
25
25
-
-
-
-
-
-
-
25
-
-
-
Min
85
-
-
-
10
5
0
0
10
85
70
0
70
60
0
0
35
0
5
85ns
Max
-
85
85
45
-
-
30
20
-
-
-
-
-
-
-
25
-
-
-
Min
100
-
-
-
10
5
0
0
15
100
80
0
80
70
0
0
40
0
5
100ns
Max
-
100
100
50
-
-
30
20
-
-
-
-
-
-
-
30
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
V
DR
KM68V512AL-L
KM68V512ALE-L
KM68V512ALI-L
Data retention current
I
DR
KM68U512AL-L
KM68U512ALE-L
KM68U512ALI-L
Data retention set-up time
Recovery time
t
SDR
t
RDR
Symbol
Test Condition
CS
1
1)
≥Vcc-0.2V
Min
2.0
-
-
-
-
-
-
0
5
Typ
-
-
-
-
-
-
-
-
-
Max
3.6
10
15
15
8
10
10
-
-
ms
Unit
V
Vcc=3.0V, CS
1
≥Vcc-0.2V,
CS
2
≥Vcc-0.2V
or CS
2
≤0.2V
µA
See data retention waveform
1. CS
1
≥Vcc-0.2V,
CS
2
≥Vcc-0.2V(
CS
1
controlled) or CS
2
≤0.2V(CS
2
controlled)
5
Revision 3.0
February 1998
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