STM32L162QDH7DTR datasheet, PDF

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STM32L162QDH7DTR: DescriptionRISC MICROCONTROLLER; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，154 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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STM32L162QDH7DTR Overview

RISC MICROCONTROLLER

STM32L162QDH7DTR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	STMicroelectronics
package instruction	VFBGA,
Reach Compliance Code	compliant
Has ADC	YES
Address bus width	26
bit size	32
maximum clock frequency	24 MHz
DMA channel	YES
External data bus width	16
length	7 mm
Number of I/O lines	109
Number of terminals	132
PWM channel	YES
encapsulated code	VFBGA
Package shape	SQUARE
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
rom(word)	393216
speed	32 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	1.65 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Terminal form	BALL
Terminal pitch	0.5 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC
Base Number Matches	1

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STM32L162VD, STM32L162ZD,

STM32L162QD, STM32L162RD

Ultra-low-power 32-bit MCU ARM

Cortex

-M3, 384KB Flash,

48KB SRAM, 12KB EEPROM, LCD, USB, ADC, memory I/F, AES

Datasheet

production data

Features

•

Ultra-low-power platform

– 1.65 V to 3.6 V power supply

–

-40°C to 105°C

temperature range

– 305 nA Standby mode (3 wakeup pins)

–

1.15 µA standby mode + RTC

– 0.475 µA Stop mode (16 wakeup lines)

– 1.35 µA Stop mode + RTC

– 11 µA Low-power run mode

– 230 µA/MHz Run mode

– 10 nA ultra-low I/O leakage

– 8 µs wakeup time

•

AES-128 bit encryption hardware accelerator

•

Core: ARM

Cortex

-M3 32-bit CPU

– From 32 kHz up to 32 MHz max

– 1.25 DMIPS/MHz (Dhrystone 2.1)

– Memory protection unit

•

Reset and supply management

– Low-power, ultrasafe BOR (brownout reset)

with 5 selectable thresholds

– Ultra-low-power POR/PDR

– Programmable voltage detector (PVD)

•

Clock sources

– 1 to 24 MHz crystal oscillator

– 32 kHz oscillator for RTC with calibration

– High speed internal 16 MHz factory-

trimmed RC (+/- 1%)

– Internal low power 37 kHz RC

– Internal multispeed low power 65 kHz to

4.2 MHz

– PLL for CPU clock and USB (48 MHz)

•

Pre-programmed bootloader

– USB and USART supported

•

Development support

– Serial wire debug supported

– JTAG and trace supported

•

Up to 116 fast I/Os (102 I/Os 5V tolerant), all

mappable on 16 external interrupt vectors

LQFP144 (20 × 20 mm)

LQFP100 (14 × 14 mm)

LQFP64 (10 × 10 mm)

UFBGA132

(7 × 7 mm)

WLCSP64

(0.4 mm pitch)

•

Memories

– 384 KB Flash memory with ECC (with 2

banks of 192 KB enabling Rww capability)

– 48 KB RAM

– 12 KB of true EEPROM with ECC

– 128 byte backup register

– Memory interface controller supporting

SRAM, PSRAM and NOR Flash

•

LCD driver for up to 8x40 segments

– Support contrast adjustment

– Support blinking mode

– Step-up converter on board

•

Rich analog peripherals (down to 1.8V)

– 3x operational amplifiers

– 12-bit ADC 1 Msps up to 40 channels

– 12-bit DAC 2 ch with output buffers

– 2x ultra-low-power comparators

(window mode and wakeup capability)

•

DMA controller 12x channels

•

12x peripheral communication interfaces

– 1x USB 2.0 (internal 48 MHz PLL)

– 5x USARTs

– Up to 8x SPIs (2x I2S, 3x 16 Mbit/s)

– 2x I2Cs (SMBus/PMBus)

– 1x SDIO interface

•

11x timers: 1x 32-bit, 6x 16-bit with up to 4

IC/OC/PWM channels, 2x 16-bit basic timers,

2x watchdog timers (independent and window)

•

Up to 34 capacitive sensing channels

•

CRC calculation unit, 96-bit unique ID

February 2016

This is information on a product in full production.

DocID022268 Rev 9

1/154

www.st.com

Contents

STM32L162VD STM32L162ZD STM32L162QD STM32L162RD

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.1

2.2

Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Ultra-low-power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.2.1

2.2.2

2.2.3

2.2.4

Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Shared peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Common system strategy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1

3.2

3.3

Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

ARM

Cortex

-M3 core with MPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Reset and supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.3.1

3.3.2

3.3.3

3.3.4

Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.4

3.5

3.6

3.7

3.8

3.9

3.10

3.11

Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Low-power real-time clock and backup registers . . . . . . . . . . . . . . . . . . . 25

GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . . 25

Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

FSMC (flexible static memory controller) . . . . . . . . . . . . . . . . . . . . . . . . . 26

DMA (direct memory access) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

LCD (liquid crystal display) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

ADC (analog-to-digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

3.11.1

3.11.2

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Internal voltage reference (V

REFINT

) . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

3.12

3.13

3.14

3.15

DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Operational amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Ultra-low-power comparators and reference voltage . . . . . . . . . . . . . . . . 29

System configuration controller and routing interface . . . . . . . . . . . . . . . 29

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Contents

3.16

3.17

3.18

Touch sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

AES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

3.18.1

3.18.2

3.18.3

3.18.4

3.18.5

General-purpose timers (TIM2, TIM3, TIM4, TIM5, TIM9, TIM10 and

TIM11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Basic timers (TIM6 and TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

I²C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Universal synchronous/asynchronous receiver transmitter (USART) . . 32

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Inter-integrated sound (I2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

SDIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

3.19

Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.19.1

3.19.2

3.19.3

3.19.4

3.19.5

3.19.6

3.20

3.21

CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 33

Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

3.21.1

3.21.2

Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 34

Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

6.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

6.1.1

6.1.2

6.1.3

6.1.4

6.1.5

6.1.6

6.1.7

6.1.8

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Optional LCD power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

6.2

6.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

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Contents

6.3.1

6.3.2

6.3.3

6.3.4

6.3.5

6.3.6

6.3.7

6.3.8

6.3.9

6.3.10

6.3.11

6.3.12

6.3.13

6.3.14

6.3.15

6.3.16

6.3.17

6.3.18

6.3.19

6.3.20

6.3.21

6.3.22

6.3.23

6.3.24

STM32L162VD STM32L162ZD STM32L162QD STM32L162RD

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Embedded reset and power control block characteristics . . . . . . . . . . . 64

Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

SDIO characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

DAC electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

Operational amplifier characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 126

Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

LCD controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

7.1

7.2

7.3

7.4

7.5

7.6

LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package

information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

LQFP100, 14 x 14 mm, 100-pin low-profile quad flat package

information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package

information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137

UFBGA132, 7 x 7 mm, 132-ball ultra thin, fine-pitch ball grid

array package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

WLCSP64, 0.4 mm pitch wafer level chip scale package information . . 143

Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146

7.6.1

Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147

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