222244342102 datasheet, PDF - EEWORLD Datasheet

222244342102: DescriptionFilm Capacitor, Polystyrene, 63V, 1% +Tol, 1% -Tol, 0.0021uF,; CategoryPassive components capacitor; File Size644KB，11 Pages; ManufacturerVishay; Websitehttp://www.vishay.com

Download Datasheet Parametric View All

222244342102 Overview

Film Capacitor, Polystyrene, 63V, 1% +Tol, 1% -Tol, 0.0021uF,

Parameter Name	Attribute value
Objectid	893614626
package instruction	,
Reach Compliance Code	unknown
ECCN code	EAR99
capacitance	0.0021 µF
Capacitor type	FILM CAPACITOR
Custom functions	On Request
dielectric materials	POLYSTYRENE
high	13 mm
negative tolerance	1%
Number of terminals	2
Maximum operating temperature	85 °C
Minimum operating temperature	-55 °C
Package form	Radial
positive tolerance	1%
Rated (AC) voltage (URac)	25 V
Rated (DC) voltage (URdc)	63 V
series	KS 443

Can I directly control the high and low states of the two data lines of the USB port?: I don't work in this field. I want to know more about it and then learn about it. Thank you....; dszhang88 Embedded System

The print size of PDF output by Altium 09 is wrong! It crashed...: Help... :Sad:...; huang91 PCB Design

I want to design a PDA (slightly larger than a mobile phone) and need help with component selection: I used to make it palm-sized, but now I want to reduce it to the size of a mobile phone, so I want to use BGA packaging as much as possible. What do you recommend? 1. SDRAM 128M byte, BGA packaging, w...; masermm Embedded System

Technical sharing from a senior electronic engineer: Grounding methods: Grounding is the most basic content in circuit design , but almost no one can explain it clearly. In almost every training and communication, someone will ask, "Teacher, is there a universal grounding...; decho0821 PCB Design

New Discovery Using Internal Oscillator Clock: New Discovery Using Internal Oscillator ClockRecently, I saw an article online titled "Making life without crystal oscillators possible - UFM.[CPLD]". When using the EPM241T100C5 in the MAX II chipset...; tdyizhen1314 FPGA/CPLD

launch address in nk.bin: How is the launch address in nk.bin determined? Is it the entry address of nk's startup.s during compilation? Or something else? Thanks...; lichangjd Embedded System

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components