SaRonix
Voltage Controlled Crystal Oscillator
Technical Data
Frequency Range:
Frequency Stability:
Temperature Range:
Operating:
Storage:
Supply Voltage:
Recommended Operating:
Supply Current:
Output:
ACTUAL SIZE
CMOS / TTL
S1528 Series
1.5 MHz to 27 MHz
±50 ppm over all conditions: operating temperature, voltage change,
load change, calibration tolerance, aging, with V
C
= 2.5V
0 to +70°C, 0 to +85°C, -40 to +85°C
-55 to +125°C
5V ±5%
20mA typ, 30mA max @ 25°C, 40mA max @ operating temp range
Symmetry:
Rise & Fall Times:
Logic 0:
Logic 1:
Load:
Period Jitter RMS:
Pull Characteristics:
Input Impedance:
Frequency Response (-3dB):
Pullability:
Control Voltage:
Transfer Function:
Linearity:
Center Control Voltage:
Mechanical:
Shock:
Solderability:
Terminal Strength:
Vibration:
Resistance to Soldering Heat:
Environmental:
Thermal Shock:
Moisture Resistance:
Description
A voltage controlled crystal oscillator
providing precise rise and fall times to
drive high performance applications. The
device is packaged in a 6-pin, SMD, J
leaded package. The plastic molded sur-
face mountable package is ideal for to-
day's automated assembly environments.
Applications
• For use with phase-locked loop (PLL)
for clock and data recovery, frequency
translation, or frequency synthesis ap-
plications in video, telephony, and data
communication environments.
• Plastic molded, J-lead SMD package
• TTL and CMOS compatible
• Tri-state output
• For frequencies above 27 MHz, see
SaRonix S1518 Series
• Available as 3.3V version, see SaRonix
S1328 Series
• Available on tape & reel; 24mm tape,
500pcs per reel
Output Waveform
CMOS
T
r
1 LEVEL
80% V
DD
50% V
DD
20% V
DD
0 LEVEL
SYMMETRY
SYMMETRY
2.5 VDC
1.5 VDC
0.5 VDC
GND
T
f
T
r
TTL
T
f
V
DD
See Part Numbering Guide and Output Waveform
5ns max, 20% to 80% V
DD,
CMOS
4ns max, 0.4V to 2.4 VDC, TTL
10% V
DD
max for CMOS or 0.4 VDC max for TTL
V
CC
-0.6 VDC for CMOS or 2.4 VDC min for TTL
50pF or 10 TTL
8ps max
50KΩ min
20kHz
±20, ±50, ±70, ±100 ppm APR* (See Part Numbering Guide)
0.5 to 4.5V
Frequency increases when Control Voltage increases
10% max
2.5V
MIL-STD-883,
MIL-STD-883,
MIL-STD-202,
MIL-STD-883,
MIL-STD-202,
Method 2002, Condition B
Method 2003
Method 211, Conditions A & C
Method 2007, Condition A
Method 210, Condition I or J
MIL-STD-883, Method 1011, Condition A
MIL-STD-883, Method 1004
*
APR = (VCXO Pull relative to specified Output Freq. @ nominal control voltage) – (VCXO Freq. Stability)
DS-147
REV C
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
SaRonix
Voltage Controlled Crystal Oscillator
Technical Data
Tri-State Logic Table
Pin 2 Input
Logic 1 or NC
Logic 0 or GND
Pin 4 Output
Oscillation
High Impedance or
Standby Function
CMOS / TTL
S1528 Series
Solder Reflow Guide
Temperature – °C
250
200
150
Reflow 240°C max
4°C/sec max
Preheat 183 ±10°C
Cooling
Required Input Levels on Pin 2:
Logic 1 = 3.0V min
Logic 0 = 0.5V max
4°C/sec max
Time
1 – 2 minutes
10 sec max
Package Details
6
5
4
Part Numbering Guide
S1528
Series
S1528 = 5V VCXO, J Lead SMD
Logic Type
T = TTL
C = CMOS
Absolute Pull Range*
C = ±20 ppm
G = ±50 ppm
H = ±100 ppm***
M = ±70 ppm
C G E A
-
6.1760 (T)
(T) = Tape & Reel
full reel increments only
Frequency (MHz)
Symmetry
A = 45/55% max**
B = 40/60% max
DENOTES
PIN 1
8.74
.344
10.4
max
.409
1
2
3
13.2 max
.520
6.1
max
.240
0.46
.018
5.08
.200
5.9
.234
Operating Temperature
C = 0 to +70°C
E = 0 to +85°C
L = -40 to +85°C
2.54
.100
*
APR = (VCXO Pull relative to specified Output Freq. @ nominal control voltage) – (VCXO Freq. Stability)
**
Not available at all frequencies; TTL 13.5 to 27 MHz only
***
Not available at all frequencies and all operating temperature ranges, please contact SaRonix
0.51
x45° CHAM
.020
Test Circuits
.75
.030
V
CC
mA
M
SIMULATED TEST LOAD
390Ω
Pin 6
Pin 5
OSCILLATOR
0.1 µF
POWER
SUPPLY
Pin 4: Output
Pin 5: N/C
Pin 6: +5VDC (V
CC
)
mm
)
inches
Pin 1
VC
Pin 2
Pin 3
C
L
= 15 pF
(Note A)
Pin 4
1.50±.15
.059±.006
8.74
.344
Pin Functions:
Pin 1: Control Voltage
Pin 2: Tri-State Control
Pin 3: GND
Scale: None (Dimensions in
Recommended Land Pattern
5.08
.200
TRI-STATE INPUT OR ENABLE/DISABLE
(current limited on fixture)
NOTE A: C
L
includes probe and jig capacitance.
TTL TEST CIRCUIT
mA
M
Pin 6
0.1 µF
Pin 5
OSCILLATOR
Pin 2
Pin 4
C
L
= 50 pF (Note A)
Pin 3
1.27
.050
2.5
.100
2.54
.100
8.74
.344
POWER
SUPPLY
Pin 1
VC
TRI-STATE INPUT OR ENABLE/DISABLE
(current limited on fixture)
NOTE A: C
L
includes probe and jig capacitance.
HCMOS TEST CIRCUIT
All specifications are subject to change without notice.
DS-147
REV C
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
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