OT PLD, 50ns, TTL, CDIP20, 0.250 X 1.166 INCH, CERAMIC, DIP-20
| Parameter Name | Attribute value |
| Maker | AMD |
| Parts packaging code | DIP |
| package instruction | DIP, |
| Contacts | 20 |
| Reach Compliance Code | unknown |
| ECCN code | 3A001.A.2.C |
| Other features | REGISTER PRELOAD; POWER-UP RESET |
| maximum clock frequency | 13.3 MHz |
| JESD-30 code | R-GDIP-T20 |
| JESD-609 code | e0 |
| length | 24.257 mm |
| Dedicated input times | 8 |
| Number of I/O lines | 2 |
| Number of terminals | 20 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| organize | 8 DEDICATED INPUTS, 2 I/O |
| Output function | MIXED |
| Package body material | CERAMIC, GLASS-SEALED |
| encapsulated code | DIP |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| Programmable logic type | OT PLD |
| propagation delay | 50 ns |
| Certification status | Not Qualified |
| Maximum seat height | 5.08 mm |
| Maximum supply voltage | 5.5 V |
| Minimum supply voltage | 4.5 V |
| Nominal supply voltage | 5 V |
| surface mount | NO |
| technology | TTL |
| Temperature level | MILITARY |
| Terminal surface | TIN LEAD |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 2.54 mm |
| Terminal location | DUAL |
| width | 7.62 mm |
| Base Number Matches | 1 |
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