HM53461JP-12 datasheet, PDF - EEWORLD Datasheet

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HM53461JP-12: DescriptionVideo DRAM, 64KX4, 120ns, CMOS, PDSO24, PLASTIC, SOJ-24; Categorystorage storage; File Size6MB，37 Pages; ManufacturerHitachi （Renesas ）; Websitehttp://www.renesas.com/eng/

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HM53461JP-12 Overview

Video DRAM, 64KX4, 120ns, CMOS, PDSO24, PLASTIC, SOJ-24

HM53461JP-12 Parametric

Parameter Name	Attribute value
Parts packaging code	SOJ
package instruction	SOJ,
Contacts	24
Reach Compliance Code	unknow
ECCN code	EAR99
Maximum access time	120 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH; 256 X 4 SAM PORT
JESD-30 code	R-PDSO-J24
length	15.63 mm
memory density	262144 bi
Memory IC Type	VIDEO DRAM
memory width	4
Number of functions	1
Number of ports	2
Number of terminals	24
word count	65536 words
character code	64000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	64KX4
Package body material	PLASTIC/EPOXY
encapsulated code	SOJ
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Certification status	Not Qualified
Maximum seat height	3.76 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL
width	7.62 mm
Base Number Matches	1

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HM53461 Series, HM53462 Series

65,536-word

4-bit Multiport CMOS Video RAM

The HM53461/HM53462 is a 262,144-bit

multiport memory equipped with a 64 k-word

bit dynamic RAM port and a 256-word

4-bit

serial access memory (SAM) port. The SAM port

is connected to an internal 1,024-bit data register

through a 256-word

4-bit serial read or write

access control. In the read transfer cycle, the

memory cell data is transferred from a selected

word line of the RAM port to the data register. The

RAM port has a write mask capability in addition

to the conventional operation mode. Write bit

selection out of four data bits can be achieved. The

Hitachi 2 µm CMOS process achieves a fast serial

access operation and low power dissipation. All

inputs and outputs, including clocks, are TTL

compatible. In HM53462, the RAM port has logic

operation capability. By using this function, logic

operation between memory data and input data can

be done in one cycle.

• Data transfer operation (between RAM and

SAM)

• Fast serial access operation asynchronized with

RAM port (except data transfer cycle)

• Real time read transfer capability

• Write mask mode capability

• Logic operation capability between Din and

Dout (HM53462 Series)

• SAM organization can be changed to 1024

(HM53462 Series)

Ordering Information

Type No.

HM53461P-10

HM53461P-12

HM53461P-15

Access

Time

100 ns

120 ns

150 ns

100 ns

120 ns

150 ns

100 ns

120 ns

150 ns

100 ns

120 ns

150 ns

100 ns

120 ns

150 ns

100 ns

120 ns

150 ns

300-mil, 24-pin

plastic SOJ

(CP-24D)

28-pin

plastic ZIP

(ZP-24)

400-mil, 24-pin

plastic DIP

(DP-24A)

24-pin

plastic SOJ

(CP-24D)

24-pin

plastic ZIP

(ZP-24)

Package

400-mil, 24-pin

plastic DIP

(DP-24A)

Features

• Multiport organization

(RAM; 64 k-word

4-bit and SAM;

256 word

4-bit)

• Double layer polysilicon/polycide n-well CMOS

process

• Single 5 V (±10%)

• Low power

— Active: RAM: 380 mW max

SAM: 220 mW max

— Standby: 40 mW max.

• Access Time

— RAM: 100 ns/120 ns/150 ns

— SAM: 40 ns/40 ns/60 ns

• Cycle time

— Random read or write cycle time (RAM):

190 ns/220 ns/260 ns

— Serial read or write cycle time (SAM):

40 ns/40 ns/60 ns

• TTL compatible

• 256 refresh cycles: 4 ms

• Refresh function

—

RAS

-only refresh

—

CAS

-before-

RAS

refresh

— Hidden refresh

HM53461ZP-10

HM53461ZP-12

HM53461ZP-15

HM53461JP-10

HM53461JP-12

HM53461JP-15

HM53462P-10

HM53462P-12

HM53462P-15

HM53462ZP-10

HM53462ZP-12

HM53462ZP-15

HM53462JP-10

HM53462JP-12

HM53462JP-15

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