8500301EA datasheet, PDF - EEWORLD Datasheet

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8500301EA: DescriptionHC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 14-BIT UP BINARY COUNTER, CDIP16, CERAMIC, DIP-16; Categorylogic logic; File Size186KB，31 Pages; ManufacturerIntersil ( Renesas ); Websitehttp://www.intersil.com/cda/home/

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8500301EA Overview

HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 14-BIT UP BINARY COUNTER, CDIP16, CERAMIC, DIP-16

8500301EA Parametric

Parameter Name	Attribute value
Objectid	1900169225
Parts packaging code	DIP
package instruction	DIP,
Contacts	16
Reach Compliance Code	unknown
Counting direction	UP
series	HC/UH
JESD-30 code	R-GDIP-T16
Load/preset input	YES
Logic integrated circuit type	BINARY COUNTER
Operating mode	ASYNCHRONOUS
Number of digits	14
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
propagation delay (tpd)	360 ns
Filter level	MIL-PRF-38535
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	4.5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal location	DUAL
Trigger type	NEGATIVE EDGE
minfmax	20 MHz

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Designing With Logic

SDYA009C

June 1997

IMPORTANT NOTICE

Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any

semiconductor product or service without notice, and advises its customers to obtain the latest

version of relevant information to verify, before placing orders, that the information being relied

on is current.

TI warrants performance of its semiconductor products and related software to the specifications

applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality

control techniques are utilized to the extent TI deems necessary to support this warranty.

Specific testing of all parameters of each device is not necessarily performed, except those

mandated by government requirements.

Certain applications using semiconductor products may involve potential risks of death,

personal injury, or severe property or environmental damage (“Critical Applications”).

TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR

WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES

OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.

Inclusion of TI products in such applications is understood to be fully at the risk of the customer.

Use of TI products in such applications requires the written approval of an appropriate TI officer.

Questions concerning potential risk applications should be directed to TI through a local SC

sales office.

In order to minimize risks associated with the customer’s applications, adequate design and

operating safeguards should be provided by the customer to minimize inherent or

procedural hazards.

TI assumes no liability for applications assistance, customer product design, software

performance, or infringement of patents or services described herein. Nor does TI warrant or

represent that any license, either express or implied, is granted under any patent right, copyright,

mask work right, or other intellectual property right of TI covering or relating to any combination,

machine, or process in which such semiconductor products or services might be or are used.

1997, Texas Instruments Incorporated

Contents

Title

Page

Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Behavior With the Supply Voltage Reduced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1 Behavior With the Supply Voltage Switched Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.1 Bipolar Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.2 CMOS Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Behavior With Low Supply Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3 Supply Voltages Partially Switched Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4 Changing Powered-Up Subsystems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3 Unused Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Excessive Input Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 Transition Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6 Propagation Delay Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.1 Propagation Delay Times With Several Outputs Switching Simultaneously . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.2 Propagation Delay Times With Negative Undershooting at the Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.3 Propagation Delay Times With Large Capacitive Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.4 Input and Output Capacitances of Digital Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7 Bus Contention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

8 Backdriving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Acknowledgment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

List of Illustrations

Figure

Title

Page

Input Circuit of a Bipolar Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Device Output From SN74 Family (Standard TTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Output of Schottky TTL Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

3-State Output of Schottky TTL Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Diode Paths in CMOS Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Behavior of a TTL Device at Low Supply Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Feeding Back With CMOS Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Ideas for Protecting CMOS Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Interconnection of Unused Inputs With AND and OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Fixed Potential Connected to Unused Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Series Resistor Connected to Unused Inputs of Multiple-Emitter Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Widebus is a trademark of Texas Instruments Incorporated.

iii

List of Illustrations (continued)

Figure

Title

Page

Parasitic Transistors in CMOS Input Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Parasitic Transistors in Bipolar Input Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Setup for Generating an Undershoot Pulse (I = –60 mA, t = 100 ns) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Definition of Signal Amplitude and Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Two-Stage Shift Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Incorrect Operation of a Shift Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Inductances in the Lines Supplying a Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Increase of the Delay Time When Several Outputs Are Switched Simultaneously . . . . . . . . . . . . . . . . . . . . . . . . . 13

Increase of the Propagation Delay Time With a Widebus™ Circuit (74AC16240) . . . . . . . . . . . . . . . . . . . . . . . . . 14

Currents in the Output Stage of a Bus Driver With Negative Undershoot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Waveforms for Various Line Lengths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Bipolar Output Stage With Output Characteristics at a High Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Waveform at SN74LS00 Output (C

= 10 pF, 56 pF, and 616 pF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Determining the Short-Circuit Current With Bus Contention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

ABT Output-Stage Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Bus Supervision During Power On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Feeding Test Signals Into a Node Test Point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Low-Logic-Level Output Characteristics of SN74AS645 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Thermal Resistances in a Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Device Thermal Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

List of Tables

Table

Title

Page

Required Minimum Input Rise/Fall Rates for Logic Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Short-Circuit Current and Internal Resistance of Logic Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Capacitances of Digital Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Output-Stage Conditions During Bus Contention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Thermal Resistance of Plastic Packages in Still Air . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Abstract

Data sheets, which usually give information on device behavior only under recommended operating conditions, may only

partially answer engineering questions that arise during the development of systems using logic devices. However, information

is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:

“How does a bus driver behave with reduced (or even switched-off) supply voltage?” or “How does the delay time of a gate

with a large capacitive load change?” or “What must be considered when using

backdriving?”.

This report gives information on a number of questions that frequently arise. In addition, it provides examples that explain

phenomena that the designer should be aware of when using devices outside their recommended operating conditions.

1 Introduction

The function and behavior of digital logic devices are described fully in data sheets. Most questions regarding the behavior

of the device that arise when developing a system can be answered with the information given. However, the devices might

be operated under conditions not covered by the data sheet. This report addresses this issue and provides information on the

behavior of devices under such conditions.

Many parameter values in data sheets are not measured when the circuits are tested. The information is based on typical values

that have been established experimentally and that are applicable to the majority of devices of the same type or family. In

individual cases it might be necessary to interpret data and make measurements to accurately forecast the behavior of the

complete system.

2 Behavior With the Supply Voltage Reduced

Although not specifically mentioned in data sheets, additional components, some of them parasitic, influence operational

characteristics of devices. These components can affect the function of a system if the devices are not operated within the

recommended operating conditions. For example, large systems often require that parts of the system be shut down while other

parts continue to operate. Frequent problems occur at the interfaces between subsystems, which are operated with different

supply voltages, or whose supply voltages are switched off. This section describes the behavior of digital circuits operated with

low supply voltages.

2.1 Behavior With the Supply Voltage Switched Off

Because many circuits can be used with the various logic families, no general rule applies to the behavior of systems with supply

voltages switched off. For this reason, only the most important circuits and their behavior are discussed.

2.1.1 Bipolar Circuits

Figure 1 shows the simplified circuit of a TTL device with diode inputs, such as are used with devices in the SN74LS

(low-power Schottky TTL) logic family. However, the following comments apply to all other bipolar logic families.

VCC

Input

Figure 1. Input Circuit of a Bipolar Device

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