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5962-8769701MRA

Description
IC ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP20, CERDIP-20, FF/Latch
Categorylogic    logic   
File Size178KB,8 Pages
ManufacturerNational Semiconductor(TI )
Websitehttp://www.ti.com
Stay tuned Parametric Compare

5962-8769701MRA Overview

IC ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP20, CERDIP-20, FF/Latch

5962-8769701MRA Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionDIP, DIP20,.3
Reach Compliance Codeunknow
seriesACT
JESD-30 codeR-GDIP-T20
JESD-609 codee0
length24.51 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeD FLIP-FLOP
Maximum Frequency@Nom-Su85000000 Hz
MaximumI(ol)0.024 A
Number of digits8
Number of functions1
Number of terminals20
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityTRUE
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP20,.3
Package shapeRECTANGULAR
Package formIN-LINE
method of packingTUBE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
propagation delay (tpd)12 ns
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb) - hot dipped
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width7.62 mm
minfmax85 MHz
Base Number Matches1

5962-8769701MRA Related Products

5962-8769701MRA 5962-8769701M2A
Description IC ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP20, CERDIP-20, FF/Latch IC ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CQCC20, CERAMIC, LCC-20, FF/Latch
Is it Rohs certified? incompatible incompatible
package instruction DIP, DIP20,.3 QCCN, LCC20,.35SQ
Reach Compliance Code unknow unknown
series ACT ACT
JESD-30 code R-GDIP-T20 S-CQCC-N20
JESD-609 code e0 e0
length 24.51 mm 8.89 mm
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP
MaximumI(ol) 0.024 A 0.024 A
Number of digits 8 8
Number of functions 1 1
Number of terminals 20 20
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Output polarity TRUE TRUE
Package body material CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED
encapsulated code DIP QCCN
Encapsulate equivalent code DIP20,.3 LCC20,.35SQ
Package shape RECTANGULAR SQUARE
Package form IN-LINE CHIP CARRIER
method of packing TUBE TUBE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
power supply 5 V 5 V
propagation delay (tpd) 12 ns 12 ns
Certification status Not Qualified Not Qualified
Filter level MIL-STD-883 MIL-STD-883
Maximum seat height 5.08 mm 1.905 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount NO YES
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal surface Tin/Lead (Sn/Pb) - hot dipped Tin/Lead (Sn/Pb) - hot dipped
Terminal form THROUGH-HOLE NO LEAD
Terminal pitch 2.54 mm 1.27 mm
Terminal location DUAL QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
Trigger type POSITIVE EDGE POSITIVE EDGE
width 7.62 mm 8.89 mm
minfmax 85 MHz 85 MHz
Base Number Matches 1 1

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