5962-0722402QXB datasheet, PDF

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5962-0722402QXB: DescriptionMicroprocessor Circuit, CMOS, PBGA349, MCGA-349; CategoryThe embedded processor and controller Microcontrollers and processors; File Size8MB，176 Pages; ManufacturerAtmel (Microchip)

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Microprocessor Circuit, CMOS, PBGA349, MCGA-349

5962-0722402QXB Parametric

Parameter Name	Attribute value
Maker	Atmel (Microchip)
Parts packaging code	CGA
package instruction	BGA, CGA349,19X19,50
Contacts	349
Reach Compliance Code	unknown
bit size	32
JESD-30 code	S-PBGA-B349
length	25 mm
Number of terminals	349
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	CGA349,19X19,50
Package shape	SQUARE
Package form	GRID ARRAY
power supply	1.8,3.3 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum seat height	5.9 mm
speed	100 MHz
Maximum supply voltage	1.95 V
Minimum supply voltage	1.65 V
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
width	25 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR CIRCUIT
Base Number Matches	1

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Features

•

SPARC V8 High Performance Low-power 32-bit Architecture

•

– 8 Register Windows

Advanced Architecture:

– On-chip Amba Bus

– 5 Stage Pipeline

– 32 KB 4-way associative Instruction Cache

– 16 KB 2-way associative Data Cache

On-chip Peripherals:

– Memory Interface

PROM Controller

SRAM Controller

SDRAM Controller

– Timers

Two 32-bit Timers

Watchdog 32-bit Timer

– Two 8-bit UARTs

– Interrupt Controller with 8 External Programmable Inputs

– 32 Parallel I/O Interface

– 33MHz PCI Interface Compliant with 2.2 PCI Specification

Integrated 32/64-bit IEEE 754 Floating-point Unit

Fault Tolerance by Design

– Full Triple Modular Redundancy (TMR)

– EDAC Protection

– Parity Protection

Debug and Test Facilities

– Debug Support Unit (DSU) for Trace and Debug

– IEEE 1149.1 JTAG Interface

– Four Hardware Watchpoints

8 and 32-bit boot-PROM Interface Possibilities with EDAC

Operating range

– Voltages

3.3V ± 0.30V for I/O

1.8V ± 0.15V for Core

– Temperature

-55°C to 125°C

Clock: 0 MHz up to 100 MHz

Power consumption: 1 W at 100 MHz

Performance:

– 86 MIPS (Dhrystone 2.1)

– 23 MFLOPS (Whetstone)

Radiation Performance

– Tested up to a total dose of 300 krad (Si) according to the MIL-STD883 method

1019

– SEU error rate better than 1 E-5 error/device/day

– No Single Event Latchup below a LET threshold of 70 MeV.cm

/mg

MCGA-349 (9g) and MQFP-256 packages

Development Kit Including

– AT697 Evaluation Board

– AT697F Sample

•

Rad-Hard 32 bit

SPARC V8

Processor

AT697F

•

Rev. 7703E–AERO–08/11

AT697F

This active low output is asserted when the watchdog timer has expired and remains

asserted until the watchdog timer is reloaded with a non-null value.

BEXC*

- Bus exception (input)

This active low input is sampled simultaneously with the data during an access to the

external memory. If asserted, a memory error is generated.

Clock Interface

CLK

- Reference clock (input)

This input provides a reference to generate the internal clock used by the processor and

the internal peripherals.

BYPASS

- PLL bypass (input with pull-down)

This active high input is used to bypass the internal PLL. When asserted, the processor

is directly clocked from the external reference clock. When de-asserted, the processor

receives its clock from the internal PLL.

Caution: This signal shall be kept static and free from glitches while the processor is operating, as

it is not sampled internally. Changing the signal shall only be performed while the proces-

sor is under reset otherwise the processor's behavior is not predictable.

LOCK

- PLL lock (output)

When asserted, this active high output indicates the PLL is locked at a frequency corre-

sponding to four times the frequency of the external reference clock.

Caution: this

signal is de-asserted as soon as the PLL unlocks.

SKEW[1:0]

- Clock tree skew (input with pull-down)

These input signals are used to programme the skew on the internal triplicated clock

trees.

Caution: These signals shall be kept static and free from glitches while the processor is operating,

as they are not sampled internally. Changing these signals shall only be performed while

the processor is under reset otherwise the processor's behavior is not predictable.

Memory Interface

A[27:0]

- Address bus (output)

The lower 28 bits of the 32 bit address bus carry instruction or data addresses during a

fetch or a load/store operation to the external memory. The address of the last external

memory access remains on the address bus whenever the current access can be made

out of the internal cache.

D[31:0]

- Data bus (bi-directional)

The 32-bit bi-directional data bus serves as the interface between the processor and the

external memory. The data bus is only driven by the processor during the execution of

integer & floating-point store instructions and the store cycle of atomic-load-store

instructions. It is kept in high impedance otherwise. However:

•

only

D[31:24]

are used during an access to an 8-bit area

D[15:0]

are used as part of the general-purpose I/O interface whenever all the

memory areas (ROM, SRAM & I/O) are 8-bit wide and the SDRAM interface is not

enabled

CB[7:0]

- Check bits (bi-directional)

7703E–AERO–08/11

5962-0722402QXB Related Products

	5962-0722402QXB	5962-0722402VYC	5962-0722402QYC
Description	Microprocessor Circuit, CMOS, PBGA349, MCGA-349	Microprocessor Circuit, CMOS, PQFP256, QFP-256	Microprocessor Circuit, CMOS, PQFP256, QFP-256
Maker	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)
Parts packaging code	CGA	QFP	QFP
package instruction	BGA, CGA349,19X19,50	FQFP, QFL256,1.5SQ,20	FQFP, QFL256,1.5SQ,20
Contacts	349	256	256
Reach Compliance Code	unknown	unknown	unknown
bit size	32	32	32
JESD-30 code	S-PBGA-B349	S-PQFP-G256	S-PQFP-G256
length	25 mm	37.085 mm	37.085 mm
Number of terminals	349	256	256
Maximum operating temperature	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	BGA	FQFP	FQFP
Encapsulate equivalent code	CGA349,19X19,50	QFL256,1.5SQ,20	QFL256,1.5SQ,20
Package shape	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	FLATPACK, FINE PITCH	FLATPACK, FINE PITCH
power supply	1.8,3.3 V	1.8,3.3 V	1.8,3.3 V
Certification status	Not Qualified	Qualified	Qualified
Filter level	38535Q/M;38534H;883B	38535V;38534K;883S	38535Q/M;38534H;883B
Maximum seat height	5.9 mm	3.18 mm	3.18 mm
speed	100 MHz	100 MHz	100 MHz
Maximum supply voltage	1.95 V	1.95 V	1.95 V
Minimum supply voltage	1.65 V	1.65 V	1.65 V
Nominal supply voltage	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY
Terminal form	BALL	GULL WING	GULL WING
Terminal pitch	1.27 mm	0.5 mm	0.5 mm
Terminal location	BOTTOM	QUAD	QUAD
width	25 mm	37.085 mm	37.085 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR CIRCUIT	MICROPROCESSOR CIRCUIT	MICROPROCESSOR CIRCUIT
Base Number Matches	1	1	1

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