531NC875M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 531NC875M000DGR

531NC875M000DGR: DescriptionLVDS Output Clock Oscillator, 875MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531NC875M000DGR Overview

LVDS Output Clock Oscillator, 875MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531NC875M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Reach Compliance Code	unknow
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	7%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	875 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Remote control receiving circuit of Panasonic inverter air conditioner indoor unit control circuit

Sleepy notification circuit

Power indicator circuit

A5348 smoke alarm detection circuit - typical application

Low noise crystal oscillator

Single-junction transistor quick test circuit (1)

NEC 78K0/KE2 pulse width measurement: For more information, please visit [color=red]bbs.getsoon.com.cn[/color] [b][size=3]NEC 78K0/KE2 Pulse Width Measurement (16-bit Timer/Counter 00)[/size][/b] Program function: Use TM00 counter to simu...; getsoon MCU

Updated on November 23: 82 IC electronic communications positions, including brief introduction and salary range (average over 200,000): IC Design 1. Manager /Sr. Manager Master degree or above, more than 7 years, MLC/SLC, English proficient, Shanghai, salary open 2. Sr/Staff/Sr. Staff Design Engineer, Master degree or above, about 5 y...; KT人才 Recruitment

What is a webinar? What resources are recommended?: Recently I saw the word [color=#656565][font=Arial, Helvetica, sans-serif, 宋体][size=12px]Webinar is very popular, but I don’t understand what it means? [/size][/font][/color] Do you know about this? A...; maaofei Download Centre

I have a question for you masters, thank you: This is a graduation project, which requires the use of two single-axis acceleration sensors to measure the attitude of the solar energy concentrator, and an electronic compass and GPS module. However...; solomake Energy Infrastructure?

What impact will right-angle routing have in PCB Layout?: Right-angle routing is generally a situation that is required to be avoided as much as possible in PCB routing, and it has almost become one of the standards for measuring the quality of routing. So h...; dafei_hz PCB Design

[Vote for group purchase] People who want TI's new TM4C LaunchPad with Ethernet, please sign up!: [b][size=5]Features:[/size][/b][list] [*][b][size=5][color=#525252][color=#00bbcc][url=http://www.ti.com/product/tm4c1294ncpdt]TM4C1294NCPDT MCU[/url][/color]: 120MHz 32-bit ARM Cortex-M4 CPU with flo...; qinkaiabc Microcontroller MCU

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components