BUK92150-55A
12 June 2014
DP
AK
N-channel TrenchMOS logic level FET
Product data sheet
1. General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
2. Features and benefits
•
•
•
•
Low conduction losses due to low on-state resistance
Q101 compliant
Suitable for logic level gate drive sources
Suitable for thermally demanding environments due to 175 °C rating
3. Applications
•
•
•
12 V and 24 V loads
Automotive and general purpose power switching
Motors, lamps and solenoids
4. Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
V
GS
= 5 V; T
mb
= 25 °C;
Fig. 2; Fig. 3
T
mb
= 25 °C;
Fig. 1
V
GS
= 10 V; I
D
= 5 A; T
j
= 25 °C
V
GS
= 5 V; I
D
= 5 A; T
j
= 175 °C;
Fig. 11; Fig. 12
V
GS
= 4.5 V; I
D
= 5 A; T
j
= 25 °C
V
GS
= 5 V; I
D
= 5 A; T
j
= 25 °C;
Fig. 11;
Fig. 12
Dynamic characteristics
Q
GD
gate-drain charge
V
GS
= 5 V; I
D
= 5 A; V
DS
= 44 V;
T
j
= 25 °C;
Fig. 13
-
2.6
-
nC
-
-
-
120
155
140
mΩ
mΩ
Min
-
-
-
Typ
-
-
-
Max
55
11
36
Unit
V
A
W
Static characteristics
drain-source on-state
resistance
-
-
97
-
125
280
mΩ
mΩ
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NXP Semiconductors
BUK92150-55A
N-channel TrenchMOS logic level FET
Symbol
E
DS(AL)S
Parameter
non-repetitive drain-
source avalanche
energy
Conditions
I
D
= 11 A; V
sup
≤ 55 V; R
GS
= 50 Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
Min
-
Typ
-
Max
16
Unit
mJ
Avalanche ruggedness
5. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
Drain
source
mounting base; connected to
drain
2
1
3
Simplified outline
mb
Graphic symbol
D
G
mbb076
S
DPAK (SOT428)
6. Ordering information
Table 3.
Ordering information
Package
Name
BUK92150-55A
BUK92150-55A/CD
DPAK
DPAK
Description
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
Version
SOT428
SOT428
Type number
7. Marking
Table 4.
Marking codes
Marking code
9215055A
Type number
BUK92150-55A
BUK92150-55A/CD
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
BUK92150-55A
Parameter
drain-source voltage
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
All information provided in this document is subject to legal disclaimers.
Min
-
Max
55
Unit
V
© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
12 June 2014
2 / 13
NXP Semiconductors
BUK92150-55A
N-channel TrenchMOS logic level FET
Symbol
V
DGR
V
GS
P
tot
I
D
Parameter
drain-gate voltage
gate-source voltage
total power dissipation
drain current
Conditions
R
GS
20 kΩ
Min
-
-15
Max
55
15
36
11
7.8
44
175
175
Unit
V
V
W
A
A
A
°C
°C
T
mb
= 25 °C;
Fig. 1
T
mb
= 25 °C; V
GS
= 5 V;
Fig. 2; Fig. 3
T
mb
= 100 °C; V
GS
= 5 V;
Fig. 3
-
-
-
-
-55
-55
I
DM
T
stg
T
j
I
S
I
SM
E
DS(AL)S
peak drain current
storage temperature
junction temperature
T
mb
= 25 °C; pulsed; t
p
≤ 10 µs;
Fig. 2
Source-drain diode
source current
peak source current
T
mb
= 25 °C
pulsed; t
p
≤ 10 µs; T
mb
= 25 °C
I
D
= 11 A; V
sup
≤ 55 V; R
GS
= 50 Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
03na19
-
-
11
44
A
A
Avalanche ruggedness
non-repetitive drain-source
avalanche energy
-
16
mJ
120
P
der
(%)
80
40
0
0
50
100
150
T
mb
(°C)
200
Fig. 1.
Normalized total power dissipation as a function of mounting base temperature
BUK92150-55A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
12 June 2014
3 / 13
NXP Semiconductors
BUK92150-55A
N-channel TrenchMOS logic level FET
10
2
I
D
(A)
10
Limit R
DSon
= V
DS
/ I
D
03nf47
t
p
= 10 µs
100 µs
DC
1
1 ms
10 ms
100 ms
10
- 1
1
10
V
DS
(V)
10
2
Fig. 2.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
12
I
D
(A)
8
03nf49
4
0
0
50
100
150
T
mb
(°C)
200
Fig. 3.
Continuous drain current as a function of mounting base temperature
9. Thermal characteristics
Table 6.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
thermal resistance
from junction to
ambient
All information provided in this document is subject to legal disclaimers.
Conditions
Fig. 4
Min
-
Typ
-
Max
4.1
Unit
K/W
R
th(j-a)
-
71.4
-
K/W
BUK92150-55A
© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
12 June 2014
4 / 13
NXP Semiconductors
BUK92150-55A
N-channel TrenchMOS logic level FET
10
Z
th(j-mb)
(K/W)
1
03nf48
δ = 0.5
0.2
0.1
0.05
0.02
P
single shot
t
p
t
T
t
p
(s)
1
t
p
T
10
- 1
δ=
10
- 2
10
- 6
10
- 5
10
- 4
10
- 3
10
- 2
10
- 1
Fig. 4.
Transient thermal impedance from junction to ambient as a function of pulse duration
10. Characteristics
Table 7.
Symbol
V
(BR)DSS
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 0.25 mA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 0.25 mA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
Fig. 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
Fig. 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
Fig. 10
I
DSS
drain leakage current
V
DS
= 55 V; V
GS
= 0 V; T
j
= 175 °C
V
DS
= 55 V; V
GS
= 0 V; T
j
= 25 °C
I
GSS
gate leakage current
V
GS
= 10 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= -10 V; V
DS
= 0 V; T
j
= 25 °C
R
DSon
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 5 A; T
j
= 25 °C
V
GS
= 5 V; I
D
= 5 A; T
j
= 175 °C;
Fig. 11; Fig. 12
V
GS
= 4.5 V; I
D
= 5 A; T
j
= 25 °C
V
GS
= 5 V; I
D
= 5 A; T
j
= 25 °C;
Fig. 11;
Fig. 12
-
-
-
120
155
140
mΩ
mΩ
-
-
-
-
-
-
-
0.05
2
2
97
-
500
10
100
100
125
280
µA
µA
nA
nA
mΩ
mΩ
0.5
-
-
V
1
1.5
2
V
Min
55
50
-
Typ
-
-
-
Max
-
-
2.3
Unit
V
V
V
Static characteristics
V
GS(th)
BUK92150-55A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
12 June 2014
5 / 13
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