PD - 9.1240B
PRELIMINARY
IRF7304
1
8
HEXFET
®
Power MOSFET
Generation V Technology
Ultra Low On-Resistance
Dual P-Channel Mosfet
Surface Mount
Available in Tape & Reel
Dynamic dv/dt Rating
Fast Switching
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing
techniques to achieve the lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and ruggedized device design for
which HEXFET Power MOSFETs are well known, provides the designer with an
extremely efficient device for use in a wide variety of applications.
The SO-8 has been modified through a customized leadframe for enhanced
thermal characteristics and multiple-die capability making it ideal in a variety of
power applications. With these improvements, multiple devices can be used in an
application with dramatically reduced board space. The package is designed for
vapor phase, infra-red, or wave soldering techniques. Power dissipation of greater
than 0.8W is possible in a typical PCB mount application.
S1
G1
S2
G2
D1
D1
D2
D2
2
7
V
DSS
= -20V
R
DS(on)
= 0.090
Ω
3
6
4
5
Top View
SO-8
Absolute Maximum Ratings
Parameter
I
D
@ T
A
= 25°C
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
P
D
@T
A
= 25°C
V
GS
dv/dt
T
J,
T
STG
10 Sec. Pulsed Drain Current, V
GS
@ -4.5V
Continuous Drain Current, V
GS
@ -4.5V
Continuous Drain Current, V
GS
@ -4.5V
Pulsed Drain Current
Power Dissipation (PCB Mount)**
Linear Derating Factor (PCB Mount)**
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Junction and Storage Temperature Range
Max.
-4.0
-3.6
-2.9
-14
1.4
0.011
±8.0
-1.2
-55 to + 150
Units
A
A
A
A
W
W/°C
V
V/ns
°C
Thermal Resistance
Parameter
R
θ
JA
Junction-to-Amb. (PCB Mount, steady state)**
Min.
––––
Typ.
––––
Max.
90
Units
°C/W
** When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
127
IRF7304
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆
V
(BR)DSS
/
∆
T
J
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
R
DS(ON)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Min.
-20
–––
–––
–––
-0.70
4.0
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ. Max. Units
Conditions
––– –––
V
V
GS
= 0V, ID = -250µA
-0.012 ––– V/°C Reference to 25°C, I
D
= -1mA
––– 0.090
V
GS
= -4.5V, I
D
= -2.2A
Ω
––– 0.140
V
GS
= -2.7V, I
D
= -1.8A
––– –––
V
V
DS
= V
GS
, I
D
= -250µA
––– –––
S
V
DS
= -16V, I
D
= -2.2A
––– -1.0
V
DS
= -16V, V
GS
= 0V
µA
––– -25
V
DS
= -16V, V
GS
= 0V, T
J
= 125°C
––– -100
V
GS
= -8.0V
nA
––– 100
V
GS
= 8.0V
––– 22
I
D
= -2.2A
––– 3.3
nC V
DS
= -16V
––– 9.0
V
GS
= -4.5V, See Fig. 6 and 12
8.4 –––
V
DD
= -10V
26 –––
I
D
= -2.2A
ns
51 –––
R
G
= 6.0Ω
33 –––
R
D
= 4.5Ω, See Fig. 10
4.0
6.0
610
310
170
–––
nH
–––
–––
–––
–––
Between lead tip
and center of die contact
V
GS
= 0V
V
DS
= -15V
ƒ = 1.0MHz, See Fig. 5
pF
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
––– ––– 1.8
MOSFET symbol
showing the
A
––– ––– -14
integral reverse
p-n junction diode.
––– ––– -1.0
V
T
J
= 25°C, I
S
= -1.8A, V
GS
= 0V
––– 56
84
ns
T
J
= 25°C, I
F
= -2.2A
––– 71 110
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
I
SD
≤
-2.2A, di/dt
≤−
50A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
150°C
Repetitive rating; pulse width limited by max. junction
temperature. ( See fig. 11 )
Pulse width
≤
300µs; duty cycle
≤
2%.
128
IRF7304
100
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
TOP
100
TOP
-ID , Drain-to-Source Current (A)
10
-ID , Drain-to-Source Current (A)
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
10
1
1
-1.5V
-1.5V
20µs PULSE WIDTH
T
J
= 25°C
A
0.1
1
10
100
0.1
0.01
0.1
0.01
20µs PULSE WIDTH
T
J
= 150°C
0.1
1
10
100
A
-VDS , Drain-to-Source Voltage (V)
-V , Drain-to-Source Voltage (V)
DS
Fig 1.
Typical Output Characteristics,
T
J
= 25
o
C
Fig 2.
Typical Output Characteristics,
T
J
= 150
o
C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
100
2.0
I
D
= -3.6A
-I
D
, Drain-to-Source Current (A)
T
J
= 25°C
10
T
J
= 150°C
1.5
1.0
1
0.5
0.1
1.5
2.0
2.5
3.0
V
DS
= -15V
20µs PULSE WIDTH
3.5
4.0
4.5
5.0
A
0.0
-60
-40
-20
0
20
40
60
80
V
GS
= -4.5V
100 120 140 160
A
-V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
129
IRF7304
1500
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd
, C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
C, Capacitance (pF)
C
iss
1000
C
oss
C
rss
500
0
1
10
100
A
-V
DS
, Drain-to-Source Voltage (V)
Fig 5.
Typical Capacitance Vs. Drain-to-Source Voltage
10
-V
GS
, Gate-to-Source Voltage (V)
8
-I
SD
, Reverse Drain Current (A)
I
D
= -2.2A
V
DS
= -16V
100
10
6
T
J
= 150°C
T
J
= 25°C
4
1
2
0
0
5
10
FOR TEST CIRCUIT
SEE FIGURE 12
15
20
25
A
0.1
0.3
0.6
0.9
1.2
V
GS
= 0V
A
1.5
Q
G
, Total Gate Charge (nC)
-V
SD
, Source-to-Drain Voltage (V)
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 7.
Typical Source-Drain Diode
Forward Voltage
130
IRF7304
100
4.0
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
-I
D
, Drain Current (Amps)
A
-I
D
, Drain Current (A)
3.0
10
1ms
2.0
10ms
1
100ms
1.0
0.1
T
A
= 25°C
T
J
= 150°C
Single Pulse
0.1
1
10
100
0.0
25
50
75
100
125
A
150
-V
DS
, Drain-to-Source Voltage (V)
T
A
, Ambient Temperature (°C)
Fig 8.
Maximum Safe Operating Area
Fig 9.
Maximum Drain Current Vs. Ambient
Temperature
Fig 10a.
Switching Time Test Circuit
Fig 10b.
Switching Time Waveforms
131
Embedded System
京公网安备 11010802033920号
EEWORLD
