EEWORLDEEWORLDEEWORLD

Part Number

Search

510FBA212M500AAGR

Description
vcxo oscillators
CategoryPassive components   
File Size233KB,26 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

510FBA212M500AAGR Online Shopping

Suppliers Part Number Price MOQ In stock  
510FBA212M500AAGR - - View Buy Now

510FBA212M500AAGR Overview

vcxo oscillators

510FBA212M500AAGR Parametric

Parameter NameAttribute value
ManufactureSilicon Laboratories
Product CategoryVCXO Oscillators
Package / Case7 mm x 5 mm
Frequency212.5 MHz
Frequency Stability50 PPM
Output FormLVDS
PackagingReel
Supply Voltage2.5 V
Termination StyleSMD/SMT
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Duty Cycle - Max52 %
Mounting StyleSMD/SMT
ProducVCXO
Factory Pack Quantity1000
Supply Voltage - Max2.75 V
Supply Voltage - Mi2.25 V
S i 5 1 0 / 5 11
C
R YS TA L
O
SCILLATOR
(XO) 100 kH
Z
Features
TO
250 MH
Z
Supports any frequency from
100 kHz to 250 MHz
Low jitter operation
2 to 4 week lead times
Total stability includes 10-year
aging
Comprehensive production test
coverage includes crystal ESR and
DLD
On-chip LDO regulator for power
supply noise filtering
3.3, 2.5, or 1.8 V operation
Differential (LVPECL, LVDS,
HCSL) or CMOS output options
Optional integrated 1:2 CMOS
fanout buffer
Runt suppression on OE and
power on
Industry standard 5 x 7 and
3.2 x 5 mm packages
Pb-free, RoHS compliant
–40
to 85
o
C operation
Si5602
Applications
SONET/SDH/OTN
Gigabit Ethernet
Fibre Channel/SAS/SATA
PCI Express
Ordering Information:
See page 14.
3G-SDI/HD-SDI/SDI
Telecom
Switches/routers
FPGA/ASIC clock generation
Pin Assignments:
See page 12.
Description
The Si510/511 XO utilizes Silicon Laboratories' advanced DSPLL technology
to provide any frequency from 100 kHz to 250 MHz. Unlike a traditional XO
where a different crystal is required for each output frequency, the Si510/511
uses one fixed crystal and Silicon Labs’ proprietary DSPLL synthesizer to
generate any frequency across this range. This IC-based approach allows
the crystal resonator to provide enhanced reliability, improved mechanical
robustness, and excellent stability. In addition, this solution provides superior
supply noise rejection, simplifying low jitter clock generation in noisy
environments. Crystal ESR and DLD are individually production-tested to
guarantee performance and enhance reliability. The Si510/511 is factory-
configurable for a wide variety of user specifications, including frequency,
supply voltage, output format, output enable polarity, and stability. Specific
configurations are factory-programmed at time of shipment, eliminating long
lead times and non-recurring engineering charges associated with custom
frequency oscillators.
OE
1
4
V
DD
GND
2
3
CLK
Si510 (CMOS)
NC
OE
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Functional Block Diagram
V
DD
OE
Si510(LVDS/LVPECL/HCSL/
Dual CMOS)
OE
OE
1
1
2
2
3
3
6
6
5
5
4
4
V
DD
V
DD
CLK–
CLK–
CLK+
CLK+
Low Noise Regulator
Fixed
Frequency
Oscillator
Any-Frequency
0.1 to 250 MHz
DSPLL
®
Synthesis
CLK+
CLK–
NC
NC
GND
GND
GND
Si511(LVDS/LVPECL/HCSL/
Dual CMOS)
Rev. 1.1 1/13
Copyright © 2013 by Silicon Laboratories
Si510/511
EEWORLD University Hall ---- Training and explanation of black technology of smart amplifier
Smart amplifier black technology training explanation : https://training.eeworld.com.cn/course/4608...
hi5 Talking
GS2100MIP WIFI module usage experience 2
We don't have a baseboard, so if we want to use GS2100 for experiments, we can only connect it ourselves. First, we need to program the flash, which requires the module's UART0 (pin27 and pin29), and ...
whoisliang RF/Wirelessly
The problems caused by multiple real-time clocks in the program are shared with everyone to warn later generations
FPGA programmers finally make a fully synchronous design, so that all programs work at the same beat of the main clock, the system timing analysis and statistics have references, and the program is st...
eeleader FPGA/CPLD
SPI cannot receive data, please help
My project needs to receive water level data from the host computer and then process it. Now the project progress is stuck on data reception. The host computer uses 51 chip. The serial port assistant ...
hujj GD32 MCU
CC2650 LaunchPad Factory Program
I tried the CC2650 LaunchPad factory program, which is very good and can control every pin. I would like to ask, does TI open source the source code of this factory program?...
undersky Wireless Connectivity
Spartan-3E_FPGA_Chinese-English User Manual
To friends in need...
CMika FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1371  2764  2709  939  1221  28  56  55  19  25 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号