INTEGRATED CIRCUITS
CBT3244A
Octal bus switch with quad output enables
Product data sheet
2004 May 26
Philips
Semiconductors
Philips Semiconductors
Product data sheet
Octal bus switch with quad output enables
CBT3244A
FEATURES
•
Standard ’244-type pinout
•
5
Ω
switch connection between two ports
•
TTL compatible control input levels
•
Package options include plastic small outline (D), shrink small
outline (DB), QSOP (DS), and thin shrink small outline (TSSOP)
PIN CONFIGURATION — SO, SSOP, QSOP, and
TSSOP
1OE
1A1
2B4
1A2
2B3
1A3
2B2
1A4
2B1
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
V
CC
2OE
1B1
2A4
1B2
2A3
1B3
2A2
1B4
2A1
•
Latch-up protection exceeds 500 mA per JESD78
•
ESD protection exceeds 1000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
DESCRIPTION
The CBT3244A provides eight bits of high-speed TTL-compatible
bus switching in a standard ’244 device pinout. The low on-state
resistance of the switch allows connections to be made with minimal
propagation delay.
The CBT3244A device is organized as two 4-bit low-impedance
switches with separate output-enable (OE) inputs. When OE is
LOW, the switch is on and data can flow from port A to port B, or
vice versa. When OE is HIGH, the switch is open and
high-impedance state exists between the two ports.
The CBT3244A is characterized for operation from –40
°C
to 85
°C.
GND 10
SA00501
Figure 1. Pin configuration — SO, SSOP, QSOP, and TSSOP
PIN DESCRIPTION
PIN NUMBER
1, 19
2, 4, 6, 8
11, 13, 15, 17
18, 16, 14, 12
9, 7, 5, 3
10
20
SYMBOL
1OE, 2OE
1A1–1A4
2A1–2A4
1B1–1B4
2B1–2B4
GND
V
CC
NAME AND FUNCTION
Output enable
Inputs
Inputs
Outputs
Outputs
Ground (0V)
Positive supply voltage
ORDERING INFORMATION
PACKAGES
20-Pin Plastic TSSOP
20-Pin Plastic SSOP (QSOP)
20-Pin Plastic SSOP
TEMPERATURE RANGE
–40
°C
to 85
°C
–40
°C
to 85
°C
–40
°C
to 85
°C
ORDER CODE
CBT3244APW
CBT3244ADS
CBT3244ADB
TOPSIDE MARK
CT3244A
CT3244ADS
CT3244A
DWG NUMBER
SOT360-1
SOT724-1
SOT339-1
SOT163-1
20-Pin Plastic SO
–40
°C
to 85
°C
CBT3244AD
CBT3244AD
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
2004 May 26
2
Philips Semiconductors
Product data sheet
Octal bus switch with quad output enables
CBT3244A
LOGIC SYMBOL
2
1A1
18
1B1
FUNCTION TABLE
INPUTS
1OE
L
2OE
L
H
L
H
OUTPUTS
1A, 1B
1A = 1B
1A = 1B
Z
Z
2A, 2B
2A = 2B
Z
2A = 2B
Z
8
1A4
12
1B4
L
H
H
1
1OE
11
2A1
9
2B1
H = High voltage level
L = Low voltage level
Z = High-impedance “off ” state
17
2A4
3
2B4
19
2OE
SA00503
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0 V
output in Off or HIGH state
output in LOW state
V
I
< 0 V
CONDITIONS
RATING
–0.5 to +7.0
–18
–1.2 to +7.0
–50
–0.5 to +7
128
–65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
T
amb
DC supply voltage
HIGH-level input voltage
LOW-level Input voltage
Operating free-air temperature range
PARAMETER
Min
4.5
2.0
—
–40
Max
5.5
—
0.8
+85
UNIT
V
V
V
°C
2004 May 26
3
Philips Semiconductors
Product data sheet
Octal bus switch with quad output enables
CBT3244A
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= –40
°C
to +85
°C
Min
V
IK
I
I
I
CC
∆I
CC
C
I
C
IO(OFF)
Input clamp voltage
Input leakage current
Quiescent supply current
Additional supply current per
input pin
2
Control pins input capacitance
Input/output capacitance
V
CC
= 4.5 V; I
I
= –18 mA
V
CC
= 5.5 V; V
I
= GND or 5.5 V
V
CC
= 5.5 V; I
O
= 0, V
I
= V
CC
or GND
V
CC
= 5.5 V, one input at 3.4 V, other inputs at
V
CC
or GND
V
I
= 3 V or 0 V, OE = V
CC
OE = V
CC
= 5.0 V
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 64 mA
r
on3
On-resistance
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 30 mA
V
CC
= 4.5 V; V
I
= 2.4 V; I
I
= 15 mA
—
—
—
—
—
—
—
—
—
Typ
1
—
—
1
—
3
3
4
4
8
Max
–1.2
±1
3
2.5
—
—
7
7
15
Ω
V
µA
µA
mA
pF
pF
UNIT
NOTES:
1. All typical values are at V
CC
= 5 V, T
amb
= 25
°C
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch.
On-state resistance is determined by the lowest voltage of the two (A or B) terminals.
AC CHARACTERISTICS
GND = 0 V; t
R;
C
L
= 50 pF
LIMITS
SYMBOL
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
T
amb
= –40
°C
to +85
°C
V
CC
= +5.0 V
±
0.5 V
Min
t
pd
t
en
t
dis
Propagation delay
1
Output enable time
to HIGH and LOW level
Output disable time
from HIGH and LOW level
A or B
OE
OE
B or A
A or B
A or B
—
1.0
1.0
Max
.25
5.6
6.0
ns
ns
ns
UNIT
NOTE:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
2004 May 26
4
Philips Semiconductors
Product data sheet
Octal bus switch with quad output enables
CBT3244A
AC WAVEFORMS
V
M
= 1.5 V, V
IN
= GND to 3.0 V
3V
1.5 V
INPUT
0V
t
PLH
t
PHL
V
OH
1.5 V
OUTPUT
V
OL
1.5 V
Output
Waveform 1
S1 at 7 V
(see Note)
t
PZH
Output
Waveform 2
S1 at Open
(see Note)
t
PZL
t
PLZ
1.5 V
3V
Output Control
(Low-level
enabling )
1.5 V
1.5 V
0V
3.5 V
1.5 V
t
PHZ
V
OH
– 0.3 V
1.5 V
0V
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
V
OL
+ 0.3 V
V
OL
V
OH
SA00028
Waveform 1. Input to Output Propagation Delays
SA00029
Waveform 2. 3-State Output Enable and Disable Times
TEST CIRCUIT AND WAVEFORMS
7V
From Output
Under Test
C
L
= 50 pF
500
Ω
S1
Open
GND
500
Ω
Load Circuit
TEST
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
open
7V
open
DEFINITIONS
Load capacitance includes jig and probe capacitance;
C
L
=
see AC CHARACTERISTICS for value.
SA00012
NOTES:
1. All input pulses are supplied by generators having the following
characteristics: PRR
≤
10MHz, Z
O
= 50
Ω,
t
r
≤
2.5 ns, t
f
≤
2.5 ns.
2. The outputs are measured one at a time with one transition per
measurement.
2004 May 26
5
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