INTEGRATED CIRCUITS
CBT3245A
Octal bus switch
Product data
Supersedes data of 2002 Feb 18
2003 Jun 27
Philips
Semiconductors
Philips Semiconductors
Product data
Octal bus switch
CBT3245A
FEATURES
PIN CONFIGURATION — DHVQFN
NC
1
A1
A2
A3
A4
A5
A6
A7
2
3
4
5
6
7
8
9
10
GND
11
B8
V
CC
20
19
18
OE
B1
•
Standard ’245-type pinout
•
5
Ω
switch connection between two ports
•
TTL compatible control input levels
•
Package options include plastic small outline (D), shrink small
outline (DB), thin shrink small outline (TSSOP)
**
17 B2
•
Latch-up protection exceeds 500 mA per JESD78
•
ESD protection exceeds 2000 V HBM per JESD22-A114,
150 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
GND*
16 B3
15
B4
14 B5
13
12
B6
B7
DESCRIPTION
The CBT3245A provides eight bits of high-speed TTL-compatible
bus switching in a standard ’245 device pinout. The low on-state
resistance of the switch allows connections to be made with minimal
propagation delay.
The CBT3245A device is organized as one 8-bit switch. When
enable (OE) is LOW, the switch is on and port A is connected to
port B. When OE is HIGH, the switch is open and a high-impedance
state exists between the two ports.
The CBT3245A is characterized for operation from -40 to +85
°C.
A8
* THE DIE SUBSTRATE IS ATTACHED TO THIS PAD USING CONDUCTIVE DIE
ATTACH MATERIAL. IT CANNOT BE USED AS A SUPPLY PIN OR INPUT.
** PIN 1 INDICATION DOT
SA00649
Figure 2. Pin configuration — DHVQFN (top view)
PIN DESCRIPTION
PIN NUMBER
1
19
2, 3, 4, 5, 6, 7, 8, 9
SYMBOL
NC
OE
A1-A8
B1-B8
GND
V
CC
NAME AND FUNCTION
No internal connection
Output enable input
Inputs
Outputs
Ground (0V)
Positive supply voltage
PIN CONFIGURATION — SO, SSOP, QSOP, AND
TSSOP
NC
A1
A2
A3
A4
A5
A6
A7
A8
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
18, 17, 16, 15, 14,
13, 12, 11
10
20
GND 10
SA00507
Figure 1. Pin configuration — SO, SSOP, QSOP, and TSSOP
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DHVQFN
20-Pin Plastic TSSOP
20-Pin Plastic SSOP (QSOP)
20-Pin Plastic SSOP
20-Pin Plastic SO
TEMPERATURE RANGE
-40 to 85
°C
-40 to 85
°C
-40 to 85
°C
-40 to 85
°C
-40 to 85
°C
ORDER CODE
CBT3245ABQ
CBT3245APW
CBT3245ADS
CBT3245ADB
CBT3245AD
TOPSIDE MARK
CT3245A
CT3245A
CT3245ADS
CT3245A
CBT3245AD
DWG NUMBER
SOT764-1
SOT360-1
SOT724-1
SOT339-1
SOT163-1
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
2003 Jun 27
2
Philips Semiconductors
Product data
Octal bus switch
CBT3245A
LOGIC SYMBOL
FUNCTION TABLE
INPUT
INPUTS/OUTPUTS
A, B
A=B
Z
OE
B1
A1
2
18
L
9
11
H
B8
A8
H = HIGH voltage level
L = LOW voltage level
Z = HIGH impedance “off” state
OE
19
SA00508
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0
output in Off or HIGH state
output in LOW state
V
I
< 0
CONDITIONS
RATING
-0.5 to +7.0
-50
-0.5 to +7.0
-50
-0.5 to +7
128
-65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
T
amb
DC supply voltage
HIGH-level input voltage
LOW-level input voltage
Operating free-air temperature range
PARAMETER
MIN
4.0
2.0
—
-40
MAX
5.5
—
0.8
+85
V
V
V
°C
UNIT
2003 Jun 27
3
Philips Semiconductors
Product data
Octal bus switch
CBT3245A
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= -40 to +85
°C
MIN
V
IK
I
I
I
CC
∆I
CC
C
I
C
IO(OFF)
r
on3
Input clamp voltage
Input leakage current
Quiescent supply current
Additional supply current per
input pin
2
Control pins
Pin capacitance (OFF state)
V
CC
= 4.5 V; I
I
= -18 mA
V
CC
= 5.5 V; V
I
= GND or 5.5 V
V
CC
= 5.5 V; I
O
= 0, V
I
= V
CC
or GND
V
CC
= 5.5 V, one input at 3.4 V, other inputs at
V
CC
or GND
V
I
= 3 V or 0, OE = V
CC
V
O
= 3 V or 0
V
CC
= 4.5 V; V
1
= 0 V; I
I
= 64 mA
On-resistance
V
CC
= 4.5 V; V
1
= 0 V; I
I
= 30 mA
V
CC
= 4.5 V; V
1
= 2.4 V; I
I
= 15 mA
—
—
—
—
—
—
—
—
—
TYP
1
—
—
1
—
3.2
6.6
5
5
10
MAX
-1.2
±5
3
3.5
—
—
7
7
15
Ω
V
µA
µA
mA
pF
pF
UNIT
NOTES:
1. All typical values are at V
CC
= 5 V, T
amb
= 25
°C
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch.
On-state resistance is determined by the lowest voltage of the two (A or B) terminals.
AC CHARACTERISTICS
GND = 0 V; t
R;
C
L
= 50 pF
CBT3245A
SYMBOL
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
T
amb
= -40 to +85
°C
V
CC
= +5.0 V
±0.5
V
MIN
t
pd
t
en
t
dis
Propagation delay
1
Output enable time
to HIGH and LOW level
Output disable time
from HIGH and LOW level
A or B
OE
OE
B or A
A or B
A or B
—
1.0
1.0
MAX
0.25
5.9
6.0
ns
ns
ns
UNIT
NOTES:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
2003 Jun 27
4
Philips Semiconductors
Product data
Octal bus switch
CBT3245A
AC WAVEFORMS
V
M
= 1.5 V, V
IN
= GND to 3.0 V
3V
3V
1.5 V
INPUT
0V
t
PLH
t
PHL
V
OH
1.5 V
OUTPUT
V
OL
SA00028
Output
Waveform 2
S1 at Open
(see Note)
1.5 V
Output
Waveform 1
S1 at 7 V
(see Note)
t
PZH
t
PZL
t
PLZ
1.5 V
Output Control
(Low-level
enabling )
1.5 V
1.5 V
0V
3.5 V
1.5 V
t
PHZ
V
OH
- 0.3 V
1.5 V
0V
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
SA00029
V
OL
+ 0.3 V
V
OL
V
OH
Waveform 1. Input to Output Propagation Delays
Waveform 2. 3-State Output Enable and Disable Times
TEST CIRCUIT AND WAVEFORMS
7V
From Output
Under Test
C
L
= 50 pF
500
Ω
S1
Open
GND
500
Ω
Load Circuit
TEST
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
open
7V
open
DEFINITIONS
C
L
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
SA00012
NOTES:
1. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, Z
O
= 50
Ω,
t
r
≤
2.5 ns, t
f
≤
2.5 ns.
2. The outputs are measured one at a time with one transition per measurement.
2003 Jun 27
5
京公网安备 11010802033920号
EEWORLD
