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5962-8866203TX

Description
Standard SRAM, 32KX8, 55ns, CMOS, CDFP28,
Categorystorage    storage   
File Size165KB,22 Pages
ManufacturerEDI [Electronic devices inc.]
Download Datasheet Parametric View All

5962-8866203TX Overview

Standard SRAM, 32KX8, 55ns, CMOS, CDFP28,

5962-8866203TX Parametric

Parameter NameAttribute value
MakerEDI [Electronic devices inc.]
package instructionDFP,
Reach Compliance Codeunknown
Maximum access time55 ns
Other featuresTTL COMPATIBLE INPUTS/OUTPUTS; BATTERY BACKUP; LOW POWER STANDBY
JESD-30 codeR-CDFP-F28
memory density262144 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize32KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Package shapeRECTANGULAR
Package formFLATPACK
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height3.302 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
width10.16 mm
Base Number Matches1
REVISIONS
LTR
A
B
DESCRIPTION
Changes in accordance with NOR 5962-R076-92.
Redrawn with changes. Add devices 05 through 09. Add vendor
CAGE number 6Y440 to device types 01 through 04, N package only,
device types 05 through 09 X,Y,T, U and N. Add vendor CAGE
number 04713 to device types 02,03, and 04, X package only. Add
vendor CAGE number 65786 to device types 03 through 06 packages
X, Y, U, N, and M, and to device types 07 and 08, packages Y, U, N,
and M. Add vendor CAGE number 61772 to devices 05 and 06,
packages X, Y, M, N and U. Add vendor CAGE number 0K6N4 to
device types 03 through 08 packages Y,U,N, and M. Remove vendor
CAGE numbers 0BK02 and 0BYV4 from the drawing. Editorial
changes throughout.
Changes in accordance with NOR 5962-R098-95
Boilerplate update, part of 5 year review. ksr
DATE (YR-MO-DA)
91-11-26
93-0217
APPROVED
Ray Monnin
M. A. Frye
C
D
95-04-14
07-10-02
M. A. Frye
Robert M. Heber
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
REV
SHEET
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
D
10
D
11
D
12
D
13
D
14
PREPARED BY
Kenneth S. Rice
CHECKED BY
Ray Monnin
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
88-09-27
REVISION LEVEL
D
SIZE
A
SHEET
DSCC FORM 2233
APR 97
.
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS, 32K X 8 STATIC RAM (SRAM),
MONOLITHIC SILICON
CAGE CODE
67268
1 OF
14
5962-88662
5962-E598-07
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Index Files: 1238  1144  2834  1473  1918  25  24  58  30  39 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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