5CGXFC9E6F35C7N datasheet, PDF

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5CGXFC9E6F35C7N: Descriptionfpga - field programmable gate array fpga - cyclone V GX 11356 labs 560 ios; Categorysemiconductor Other integrated circuit (IC); File Size827KB，37 Pages; ManufacturerAltera (Intel); Environmental Compliance

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5CGXFC9E6F35C7N Overview

fpga - field programmable gate array fpga - cyclone V GX 11356 labs 560 ios

5CGXFC9E6F35C7N Parametric

Parameter Name	Attribute value
Manufacture	Alte
Product Category	FPGA - Field Programmable Gate Array
RoHS	Yes
Produc	Cyclone V GX
Number of Logic Elements	301000
Number of Logic Array Blocks - LABs	113560
Total Memory	13917 kbi
Number of I/Os	560
Operating Supply Voltage	1.1 V
Maximum Operating Temperature	+ 85 C
Mounting Style	SMD/SMT
Package / Case	FBGA-1152
Data Rate	3.125 Gbps
Embedded Block RAM - EBR	1717 kbi
M10K Memory	12200 kbi
Maximum Operating Frequency	800 MHz
Minimum Operating Temperature	0 C
Number of Transceivers	12
Packaging	Tray
Factory Pack Quantity	24

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2014.07.07

Cyclone V Device Overview

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CV-51001

The Cyclone

V devices are designed to simultaneously accommodate the shrinking power consumption,

cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and

cost-sensitive applications.

Enhanced with integrated transceivers and hard memory controllers, the Cyclone V devices are suitable

for applications in the industrial, wireless and wireline, military, and automotive markets.

Cyclone V Device Handbook: Known Issues

Lists the planned updates to the

Cyclone V Device Handbook

chapters.

Related Information

Key Advantages of Cyclone V Devices

Table 1: Key Advantages of the Cyclone V Device Family

Advantage

Supporting Feature

Lower power consumption

• Built on TSMC's 28 nm low-power (28LP) process technology

and includes an abundance of hard intellectual property (IP)

blocks

• Up to 40% lower power consumption than the previous

generation device

• 8-input adaptive logic module (ALM)

• Up to 13.59 megabits (Mb) of embedded memory

• Variable-precision digital signal processing (DSP) blocks

• 3.125 gigabits per second (Gbps) and 6.144 Gbps transceivers

• Hard memory controllers

• Tight integration of a dual-core ARM Cortex-A9 MPCore

processor, hard IP, and an FPGA in a single Cyclone V system-

on-a-chip (SoC)

• Supports over 128 Gbps peak bandwidth with integrated data

coherency between the processor and the FPGA fabric

Improved logic integration and

differentiation capabilities

Increased bandwidth capacity

Hard processor system (HPS) with

integrated ARM

Cortex

™

-A9

MPCore processor

trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as

trademarks or service marks are the property of their respective holders as described at

www.altera.com/common/legal.html.

Altera warrants performance

of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any

products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,

product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device

specifications before relying on any published information and before placing orders for products or services.

ISO

9001:2008

Registered

www.altera.com

101 Innovation Drive, San Jose, CA 95134

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