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74HC1G86GW,125

Description
logic gates 2-inp exclusve-OR GT
Categorylogic    logic   
File Size63KB,12 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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74HC1G86GW,125 Overview

logic gates 2-inp exclusve-OR GT

74HC1G86GW,125 Parametric

Parameter NameAttribute value
Brand NameNXP Semiconduc
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP5/6,.08
Contacts5
Manufacturer packaging codeSOT353-1
Reach Compliance Codecompli
seriesHC/UH
JESD-30 codeR-PDSO-G5
JESD-609 codee3
length2 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeXOR GATE
MaximumI(ol)0.002 A
Humidity sensitivity level1
Number of functions1
Number of entries2
Number of terminals5
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP5/6,.08
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply2/6 V
Prop。Delay @ Nom-Su27 ns
propagation delay (tpd)135 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width1.25 mm
74HC1G86; 74HCT1G86
2-input EXCLUSIVE-OR gate
Rev. 04 — 20 July 2007
Product data sheet
1. General description
74HC1G86 and 74HCT1G86 are high-speed Si-gate CMOS devices. They provide a
2-input EXCLUSIVE-OR function.
The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.
The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
The standard output currents are half those of the 74HC/HCT86.
2. Features
I
I
I
I
I
I
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
SOT353-1 and SOT753 package options
Specified from
−40 °C
to +125
°C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC1G86GW
74HCT1G86GW
74HC1G86GV
74HCT1G86GV
−40 °C
to +125
°C
SC-74A
−40 °C
to +125
°C
Name
TSSOP5
Description
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
plastic surface-mounted package; 5 leads
Version
SOT353-1
SOT753
Type number
4. Marking
Table 2.
Marking codes
Marking
HH
TH
H86
T86
Type number
74HC1G86GW
74HCT1G86GW
74HC1G86GV
74HCT1G86GV

74HC1G86GW,125 Related Products

74HC1G86GW,125 74HCT1G86GW,125 74HCT1G86GV,125 74HC1G86GV,125
Description logic gates 2-inp exclusve-OR GT logic gates 2-inp exclusve-OR GT logic gates exclusive-OR gate logic gates exclusive-OR gate
Brand Name NXP Semiconduc NXP Semiconduc NXP Semiconductor NXP Semiconductor
Is it Rohs certified? conform to conform to conform to conform to
Maker NXP NXP NXP NXP
Parts packaging code TSSOP TSSOP TSOP TSOP
package instruction TSSOP, TSSOP5/6,.08 PLASTIC, SC-88A, 5 PIN TSSOP, TSOP5/6,.11,37 TSSOP, TSOP5/6,.11,37
Contacts 5 5 5 5
Manufacturer packaging code SOT353-1 SOT353-1 SOT753 SOT753
Reach Compliance Code compli compli compliant compliant
series HC/UH HCT HCT HC/UH
JESD-30 code R-PDSO-G5 R-PDSO-G5 R-PDSO-G5 R-PDSO-G5
JESD-609 code e3 e3 e3 e3
length 2 mm 2 mm 2.9 mm 2.9 mm
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type XOR GATE XOR GATE XOR GATE XOR GATE
MaximumI(ol) 0.002 A 0.002 A 0.002 A 0.002 A
Humidity sensitivity level 1 1 1 1
Number of functions 1 1 1 1
Number of entries 2 2 2 2
Number of terminals 5 5 5 5
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP TSSOP TSSOP
Encapsulate equivalent code TSSOP5/6,.08 TSSOP5/6,.08 TSOP5/6,.11,37 TSOP5/6,.11,37
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing TAPE AND REEL TAPE AND REEL TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260 260 260
power supply 2/6 V 5 V 5 V 2/6 V
propagation delay (tpd) 135 ns 27 ns 27 ns 135 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Schmitt trigger NO NO NO NO
Maximum seat height 1.1 mm 1.1 mm 1.1 mm 1.1 mm
Maximum supply voltage (Vsup) 6 V 5.5 V 5.5 V 6 V
Minimum supply voltage (Vsup) 2 V 4.5 V 4.5 V 2 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface Tin (Sn) Tin (Sn) Tin (Sn) Tin (Sn)
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm 0.95 mm 0.95 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 30
width 1.25 mm 1.25 mm 1.5 mm 1.5 mm

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