21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT3805
PI49FCT3806
3.3V, 2 x 1:5 CMOS Clock Driver
Features
Description
Pericom Semiconductors PI49FCT series of logic circuits are
produced using the Companys advanced 0.5 micron CMOS
technology to achieve fast speed, low skew, fast slew rate, and low
propagation delay for most computing and communication
applications.
The PI49FCT3805 is a non-inverting driver, whereas the PI49FCT3806
is an inverting driver. The outputs are configured into 2 groups of
1-in, 5-out with independent output enable. Group B has an extra
MON output. Excellent output signals to power and ground ratio
minimize power and ground noise, and also improves output
performance.
Low output skew: <300ps
Switching frequency of 100 MHz
Fast output rise/fall time <1.2ns
Low propagation delay <3.0ns
Low input capacitance <4.0pF
Internal 20 Ohm resistor version
5V I/O Tolerant input
Rail-to-Rail CMOS outputs
Industrial Temperature: 40°C to +85°C
3.3V ±10% operation
Packages available:
20-pin 300-mil wide SOIC (S)
20-pin 150-mil wide QSOP (Q)
20-pin 209-mil wide SSOP (H)
PI49FCT3805 Logic Block Diagram
OE
A
5
IN
A
OA
0–4
PI49FCT3806 Logic Block Diagram
OE
A
5
IN
A
OA
0–4
5
IN
B
OE
B
OB
0–4
5
IN
B
OE
B
OB
0–4
MON
MON
1
PS7007C 10/07/99
PI49FCT3805 Product Pin Configuration
V
CCA
OA
0
OA
1
OA
2
GND
A
OA
3
OA
4
GND
Q
OE
A
IN
A
PI49FCT3806 Product Pin Configuration
V
CCA
OA
0
OA
1
OA
2
GND
A
OA
3
OA
4
GND
Q
OE
A
IN
A
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT3805/3806
3.3V, 2 x 1:5 CMOS Clock Driver
Product Pin Description
Pin Name
OE
A,
OE
B
IN
A,
IN
B
OA
N,
OB
N
MON
GND
V
CC
Description
Hi-Z State Output Enable Inputs (Active LOW)
Clock Inputs
Clock Outputs
Monitor Output
Ground
Power
PI49FCT3805 Truth Table
(1)
Inputs
OE
A
, OE
B
L
L
H
H
IN
A
, IN
B
L
H
L
H
Outputs
OA
N
, OB
N
L
H
Z
Z
MON
L
H
L
H
Note:
1. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
PI49FCT3806 Truth Table
(1)
Inputs
Outputs
IN
A
, IN
B
L
H
L
H
OA
N
, OB
N
H
L
Z
Z
MON
H
L
H
L
OE
A
, OE
B
L
L
H
H
1
2
3
4
20-Pin
5
H,P,Q,S
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CCB
OB
0
OB
1
OB
2
GND
B
OB
3
OB
4
MON
OE
B
IN
B
Note:
1. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
1
20
2
19
3
18
4
17
20-Pin
5
16
H,P,Q,S
6
15
7
14
8
13
9
12
10
11
V
CCB
OB
0
OB
1
OB
2
GND
B
OB
3
OB
4
MON
OE
B
IN
B
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(1)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
4.5
5.5
Max.
6.0
8.0
Units
pF
pF
Note:
1. This parameter is determined by device characterization but is not production tested.
2
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PI49FCT3805/3806
3.3V, 2 x 1:5 CMOS Clock Driver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ............................................................ –65°C to +150°C
Ambient Temperature with Power Applied ........................... –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) . –0.5V to +7.0V
DC Input Voltage ................................................................... –0.5V to +7.0V
DC Output Current .............................................................................. 120 mA
Power Dissipation .................................................................................... 0.5W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
Operating Range
Ambient Temperature = –40°C to +85°C
Vcc = 3.3V ± 0.3V
DC Electrical Characteristics
(Over the Operating Range)
Parameters Description
V
OH
V
OL
Output HIGH Voltage
Output LOW Voltage
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= – 0.1mA
I
OH
= – 8mA
I
OL
= 0.1mA
I
OL
= 16mA
I
OL
= 24mA
Min.
V
CC
–0.2
2.4
(3)
—
—
—
2.0
–0.5
—
—
—
—
—
–35
50
–60
—
Typ
(2)
—
3.0
—
0.2
0.3
—
—
—
—
—
—
–0.7
–60
90
–135
150
Max.
—
0.2
0.4
0.5
5.5
0.8
1
–1
1
–1
–1.2
–110
200
–240
—
Units
V
V
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
ODH
I
ODL
I
OS
V
H
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance
Output Current
Clamp Diode Voltage
Output HIGH Current
Output LOW Current
Guaranteed Logic HIGH Level (Input Pins)
Guaranteed Logic LOW Level (Input Pins)
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.
(3-State Output pins)
V
CC
= Min., I
IN
= –18mA
V
CC
= 3.3V, V
IN
=V
IH
or V
IL
, V
OUT
= 1.5V
(4)
V
CC
= 3.3V, V
IN
=V
IH
or V
IL
, V
OUT
= 1.5V
(4)
V
IN
= V
CC
(Input Pins)
V
IN
= GND (Input & Output Pins)
V
OUT
= V
CC
V
OUT
= GND
V
V
µA
µA
µA
µA
V
mA
mA
mA
mV
Short Circuit Current
(5)
V
CC
= Max., V
OUT
= GND
(5)
Input Hysteresis
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient and maximum loading.
3. V
OH
= V
CC
– 0.6V at rated current.
4. This parameter is determined by device characterization but is not production tested.
5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
3
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PI49FCT3805/3806
3.3V, 2 x 1:5 CMOS Clock Driver
Power Supply Characteristics
Parameters Description
I
CC
∆I
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Inputs @ TTL HIGH
Supply Current per
Input per MHz
(4)
Test Conditions
(1)
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.,
Outputs Open
OE
A
or OE
B
= GND
Per Output Toggling
50% Duty Cycle
V
CC
= Max.,
Outputs Open
f
O
= 10 MH
Z
50% Duty Cycle
OE
A
or OE
B
= GND
Mon. Outputs Toggling
V
CC
= Max.,
Outputs Open
f
O
= 2.5 MH
Z
50% Duty Cycle
OE
A
or OE
B
= GND
Eleven Outputs Toggling
V
IN
= GND or V
CC
V
IN
= V
CC
– 0.6V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
—
—
—
Typ
(2)
3
2.0
0.08
Max.
30
300
0.16
Units
µA
µA
mA/
MH
Z
I
C
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
– 0.6V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
– 0.6V
V
IN
= GND
—
3.3
9.0
(5)
—
3.3
10.0
(5)
mA
—
1.8
6.0
(5)
—
1.8
7.0
(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Per TTL driven input (V
IN
= V
CC
– 0.6V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
C
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= V
CC
– 0.6V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
4
PS7007C 10/07/99
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PI49FCT3805/3806
3.3V, 2 x 1:5 CMOS Clock Driver
Switching Characteristics over Operating Range
Symbol
De s cription
Condition
3280x
M ax.
3.0
3.5
4.0
1.2
0.15
0.30
0.50
0.30
0.50
0.70
125
380xD
M ax.
3.0
3.5
4.0
1.2
0.15
0.30
0.50
0.30
0.50
0.70
150
380xC
M ax.
3.5
1.5
0.35
380xB
M ax.
3.8
1.5
0.35
380xA
M ax.
4.0
1.5
0.50
380x
M ax.
4.5
1.5
0.50
ns
Units
t
PLH
t
PHL
t
R/
t
F
t
SK(o)
10pF
(1)
Propagation Delay
30pF, <100MHz
A to Bn
(4)
50pF, <67MHz
Rise/Fall Time
(3)
Output Skew
(same Pkg.)
(3)
Output Skew
(different Pkg.)
(3)
Input Frequency
0.8V 2.0V
10pF
(1)
30pF, <100MHz
50pF, <67MHz
10pF
(1)
30pF, <100MHz
50pF, <67MHz
t
SK(t)
F
IN
0.75
110
0.75
100
1.00
80
1.00
67
MHz
Notes:
1. 50-Ohm AC terminated or 50-Ohm to V
CC
/2.
2. Other loading condition is shown in Figure........
3. These parameters are guaranteed by design.
4. Minimum propagation delay of 1.5ns is guaranteed by design.
380x
20-Ohm
R
S
CI
Switch Position
Test
Disable LOW
Enable LOW
Disable HIGH
Enable HIGH
Switch
6V
GND
Open
Tests Circuits For All Outputs
(1)
V
CC
All Other Inputs
DEFINITIONS:
C
L
= Load capacitance: includes jig and
probe capacitance.
R
T
= Termination resistance: should be
equal to Z
OUT
of the Pulse Generator.
V
OUT
V
IN
Pulse
Generator
D.U.T.
R
T
30pF
C
L
5
PS7007C 10/07/99
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