WJF-6A1-S

Wang Xiaochuan, the "Wudaokou Goalkeeper", is going through a level that he has never gone through before. For example, Sogou's (NYSE: SOGO) financial report, artificial intelligence, and the futur...[Details]

1. Problem When developing STM32 with IAR, I found that I could not print floating point numbers by redirecting printf to the serial port. The code is as follows:  The output is as follows:  It can...[Details]

1. Test conditions Hardware: STM32L432KC  Main frequency: 80MHz  Compiler: IAR 8.20.1  Compiler options: High Speed ​​no size constraints  CRC generator polynomial: 0x782f 2. Test Method The softwar...[Details]

All relevant units: In accordance with the relevant requirements of the provincial and municipal electric vehicle charging infrastructure construction work, in order to further standardize the...[Details]

Function List and Notes (lower-level driver part) 1. IO port initialization: control IO and communication IO. Control includes power control, reset and low power mode. Communication is the serial po...[Details]

Recently, the "Smart Photovoltaic Industry Development Action Plan (2018-2020)" jointly issued by six departments has put this concept on the forefront. Photovoltaic smart solutions will become the ne...[Details]

The application of millimeter wave technology in mobile communications also involves a series of technical problems, including the large propagation loss of millimeter waves and the susceptibility ...[Details]

What is SYSTICK: This is a 24-bit system tick timer, SysTick, with automatic reload and overflow interrupt functions. All microcontrollers based on the Cortex_M3 processor can obtain a certain time ...[Details]

Independent watchdog (IWDG) and low power mode are often used in STM32 development. The watchdog is to detect and solve faults caused by software errors, and the low power mode is to enter sleep mode...[Details]

As shown in the figure, the author soldered a STM32F207VET6 board using a TQFP (32-100PIN) 0.55MM to direct plug adapter board. The board leads out the SWD debug interface (only PA13 and PA14 are occ...[Details]

1) ADC multi-channel acquisition: (Multi-channel acquisition must use scanning mode. In scanning mode, the channels of the rule group share a register, so DMA transmission must be used; to prevent da...[Details]

The frequency calculation formula of the PWM wave generated by the output comparison mode of the timer is: 72M/((2*(arr+1))*(psc+1) ) For example, if you set: PWM_Init(1000-1,72-1); (PWM_Init(arr,psc...[Details]

Single-chip microcomputer experiment design: It is required to use 8951 series single-chip microcomputer, design a pulse generator with a pulse width duty cycle of 50%, 25% adjustable, and a period o...[Details]

Please help me analyze the clock cycles occupied by the following delay program. Seek to explain: DELAY:  MOV  R6, #13 DELAY1: MOV  R5, #250 DELAY2: NOP         DJNZ  R5, DELAY2         DJNZ  R6, DEL...[Details]

Requirements: Set timer T1 as an external event counter, count 500 pulses every time, then switch T1 to timing mode and output a positive pulse with a width of 10ms at P1.2. Over and over again. A...[Details]