IDT7130LA25PF8 datasheet, PDF - EEWORLD Datasheet

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IDT7130LA25PF8: DescriptionDual-Port SRAM, 1KX8, 25ns, CMOS, PQFP64, TQFP-64; Categorystorage storage; File Size238KB，21 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT7130LA25PF8 Overview

Dual-Port SRAM, 1KX8, 25ns, CMOS, PQFP64, TQFP-64

IDT7130LA25PF8 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFP
package instruction	TQFP-64
Contacts	64
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	25 ns
I/O type	COMMON
JESD-30 code	S-PQFP-G64
JESD-609 code	e0
length	14 mm
memory density	8192 bit
Memory IC Type	DUAL-PORT SRAM
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of ports	2
Number of terminals	64
word count	1024 words
character code	1000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP64,.66SQ,32
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
power supply	5 V
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum standby current	0.0015 A
Minimum standby current	2 V
Maximum slew rate	0.17 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	20
width	14 mm
Base Number Matches	1

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HIGH SPEED

1K X 8 DUAL-PORT

STATIC SRAM

Features

IDT7130SA/LA

IDT7140SA/LA

◆

High-speed access

– Commercial: 20/25/35/55/100ns (max.)

– Industrial: 25/55/100ns (max.)

– Military: 25/35/55/100ns (max.)

Low-power operation

– IDT7130/IDT7140SA

—

Active: 550mW (typ.)

—

Standby: 5mW (typ.)

– IDT7130/IDT7140LA

—

Active: 550mW (typ.)

—

Standby: 1mW (typ.)

MASTER IDT7130 easily expands data bus width to 16-or-

more-bits using SLAVE IDT7140

◆

On-chip port arbitration logic (IDT7130 Only)

BUSY

output flag on IDT7130;

BUSY

input on IDT7140

INT

flag for port-to-port communication

Fully asynchronous operation from either port

Battery backup operation–2V data retention (LA only)

TTL-compatible, single 5V ±10% power supply

Military product compliant to MIL-PRF-38535 QML

Industrial temperature range (–40°C to +85°C) is available

for selected speeds

Available in 48-pin DIP, LCC and Ceramic Flatpack, 52-pin

PLCC, and 64-pin STQFP and TQFP

Green parts available, see ordering information

Functional Block Diagram

R/W

I/O

- I/O

I/O

Control

BUSY

(1,2)

I/O

-I/O

I/O

Control

BUSY

Address

Decoder

(1,2)

MEMORY

ARRAY

Address

Decoder

R/W

ARBITRATION

and

INTERRUPT

LOGIC

R/W

INT

(2)

INT

2689 drw 01

(2)

NOTES:

1. IDT7130 (MASTER):

BUSY

is open drain output and requires pullup resistor.

IDT7140 (SLAVE):

BUSY

is input.

2. Open drain output: requires pullup resistor.

JANUARY 2013

DSC-2689/15

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