EEWORLDEEWORLDEEWORLD

Part Number

Search

91C100FDREVB

Description
FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
File Size431KB,68 Pages
ManufacturerSMSC
Websitehttp://www.smsc.com/
Download Datasheet Compare View All

91C100FDREVB Overview

FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY

LAN91C100FD REV. B
PRELIMINARY
FEAST Fast Ethernet Controller
with Full Duplex Capability
FEATURES
Dual Speed CSMA/CD Engine (10 Mbps and 100
Mbps)
Compliant with IEEE 802.3 100BASE-T
Specification
Supports 100BASE-TX, 100BASE-T4, and
10BASE-T Physical Interfaces
32 Bit Wide Data Path (into Packet Buffer Memory)
Support for 32 and 16 Bit Buses
Support for 32, 16 and 8 Bit CPU Accesses
Synchronous, Asynchronous and Burst DMA
Interface Mode Options
128 Kbyte External Memory
Built-in Transparent Arbitration for Slave Sequential
Access Architecture
Early TX, Early RX Functions
Flat MMU Architecture with Symmetric Transmit
and Receive Structures and Queues
MII (Media Independent Interface) Compliant MAC-
PHY Interface Running at Nibble Rate
MII Management Serial Interface
Seven Wire Interface to 10 Mbps ENDEC
EEPROM-Based Setup
Full Duplex Capability
GENERAL DESCRIPTION
The LAN91C100FD is designed to facilitate the implementation of first generation Fast Ethernet adapters and connectivity
products. For this first generation of products, flexibility dominates over integration. The LAN91C100FD is a digital device
that implements the MAC portion of the CSMA/CD protocol at 10 and 100 Mbps, and couples it with a lean and fast data
and control path system architecture to ensure the CPU to packet RAM data movement does not cause a bottleneck at 100
Mbps.
Total memory size is 128 Kbytes, equivalent to a total chip storage (transmit plus receive) of 64 outstanding packets. The
LAN91C100FD is software compatible with the LAN9000 family of products and can use existing LAN9000 drivers (ODI,
IPX, and NDIS) in 16 and 32 bit Intel X86 based environments.
Memory management is handled using a unique MMU (Memory Management Unit) architecture and a 32-bit wide
data path. This I/O mapped architecture can sustain back-to-back frame transmission and reception for superior data
throughput and optimal performance. It also dynamically allocates buffer memory in an efficient buffer utilization
scheme, reducing software tasks and relieving the host CPU from performing these housekeeping functions. The
total memory size is 128 Kbytes (external), equivalent to a total chip storage (transmit and receive) of 64 outstanding
packets.
FEAST provides a flexible slave interface for easy connectivity with industry-standard buses. The Bus Interface Unit
(BIU) can handle synchronous as well as asynchronous buses, with different signals being used for each one.
FEAST's bus interface supports synchronous buses like the VESA local bus, as well as burst mode DMA for EISA
environments. Asynchronous bus support for ISA is supported even though ISA cannot sustain 100 Mbps traffic.
Fast Ethernet could be adopted for ISA-based nodes on the basis of the aggregate traffic benefits.
Two different interfaces are supported on the network side. The first is a conventional seven wire ENDEC interface that
connects to the LAN83C694 for 10BASE-T and coax 10 Mbps Ethernet networks. The second interface follows the MII
(Media Independent Interface) specification draft standard, consisting of 4 bit wide data transfers at the nibble rate. This
interface is applicable to 10 Mbps or 100 Mbps networks. Three of the LAN91C100FD’s pins are used to interface to the
two-line MII serial management protocol. Four I/O ports (one input and three output pins) are provided for LAN83C694
configuration.
SMSC DS – LAN91C100FD REV. B
Rev. 05/31/2000

91C100FDREVB Related Products

91C100FDREVB LAN91C100FDREVB LAN91C100FDTQFP
Description FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
EEWORLD University ---- Atmel Edge Schematic 201
Atmel Edge Schematics 201 : https://training.eeworld.com.cn/course/71?Take you to understand the basic characteristics of a good circuit schematic, that is, the circuit diagram follows the basic proce...
dongcuipin Talking
How is the microcontroller PWM to 4-20mA circuit usually implemented?
How is the MCU PWM to 4-20mA circuit usually implemented?How competitive is the GP8102's multiple output form solution? For your reference...
zjqmyron Power technology
[Series] Received the board, getting started
The entire development tool is in a compact box, including the white EZ-CUBE emulator and the R7F0C80212 development board. Of course, accessories are indispensable, including USB cable, 8-pin emulato...
zjw5000 Renesas Electronics MCUs
Reset chip
Which reset chip is best for MSP430?...
zzz4444 Microcontroller MCU
How to configure ST-LINK/V2 in the STM32CUBEIDE environment?
There is always an error in configuring ST-LINK/V2 in the STM32CUBEIDE environment. Which master knows how to configure it?...
ZHANGXUEJIE stm32/stm8
【IoT Project Idea】IoT Intelligent Control of Electric Vehicle Charging
[align=left][font=宋体] I suddenly had an idea for electric cars that need to be charged all day, and I want to design a system based on the Internet of Things to control power. I have also thought abou...
陌路绝途 Energy Infrastructure?

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2604  2826  2031  2327  2069  53  57  41  47  42 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号