SI4432-V2-FM datasheet, PDF - EEWORLD Datasheet

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SI4432-V2-FM: DescriptionIC txrx ism 930mhz 3.6V 20-qfn; CategoryWireless rf/communication; File Size2MB，158 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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SI4432-V2-FM Overview

IC txrx ism 930mhz 3.6V 20-qfn

SI4432-V2-FM Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	compliant
JESD-609 code	e3
Terminal surface	Matte Tin (Sn)

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Si4431

Si4431 ISM T

RANSCEIVER

Features



Frequency Range = 240–930 MHz

Sensitivity = –118 dBm

+13 dBm Max Output Power



Configurable –8 to +13 dBm

Low Power Consumption



18.5 mA receive



28 mA @ +13 dBm transmit

Data Rate = 1 to 128 kbps

Power Supply = 1.8 to 3.6 V

Ultra low power shutdown mode

Digital RSSI

Wake-on-radio

Auto-frequency calibration (AFC)



Antenna diversity and TR switch

control

Configurable packet structure

Preamble detector

TX and RX 64 byte FIFOs

Low battery detector

Temperature sensor and 8-bit ADC

–40 to +85 °C temperature range

Integrated voltage regulators

Frequency hopping capability

On-chip crystal tuning

20-Pin QFN package

FSK, GFSK, and OOK modulation

Low BOM

Power-on-reset (POR)

Ordering Information:

See page 156.

Pin Assignments

Si4431

XOUT



Remote control

Home security & alarm

Telemetry

Personal data logging

Toy control

Tire pressure monitoring

Wireless PC peripherals



Remote meter reading

Remote keyless entry

Home automation

Industrial control

Sensor networks

Health monitors

Tag readers

20 19 18 17 16

VDD_RF

RXp

RXn

VR_IF

Metal

Paddle

GPIO_0

GPIO_1

9 10

GPIO_2

VDR

SCLK

SDI

SDO

VDD_DIG

Description

Silicon Laboratories’ Si4431 highly integrated, single chip wireless ISM

transceiver is part of the EZRadioPRO™ family. The EZRadioPRO family includes

a complete line of transmitters, receivers, and transceivers allowing the RF

system designer to choose the optimal wireless part for their application.

The Si4431 offers advanced radio features including continuous frequency

coverage from 240–930 MHz The Si4431’s high level of integration offers reduced

BOM cost while simplifying the overall system design. The extremely low receive

sensitivity (–118 dBm) coupled with industry leading +20 dBm output power

ensures extended range and improved link performance. Built-in antenna diversity

and support for frequency hopping can be used to further extend range and

enhance performance.

Additional system features such as an automatic wake-up timer, low battery

detector, 64 byte TX/RX FIFOs, automatic packet handling, and preamble

detection reduce overall current consumption and allow the use of lower-cost

system MCUs. An integrated temperature sensor, general purpose ADC, power-

on-reset (POR), and GPIOs further reduce overall system cost and size.

The Si4431’s digital receive architecture features a high-performance ADC and

DSP based modem which performs demodulation, filtering, and packet handling

for increased flexibility and performance. This digital architecture simplifies

system design while allowing for the use of lower-end MCUs. The direct digital

transmit modulation and automatic PA power ramping ensure precise transmit

modulation and reduced spectral spreading ensuring compliance with FCC and

ETSI regulations.

Preliminary Rev. 0.4 2/09

Patents pending

nSEL

nIRQ

SDN

Applications

XIN

Si4431

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

Si4431

ABLE

Section

ONTENTS

Page

1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

1.1. Definition of Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.1. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3. Controller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.1. Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.2. Operating Mode Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.3. Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.4. Device Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

3.5. System Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.6. Frequency Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

4. Modulation Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.1. Modulation Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

4.2. Modulation Data Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4.3. FIFO Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35

4.4. Direct Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35

4.5. PN9 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

4.6. Synchronous vs. Asynchronous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

5. Internal Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.1. RX LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.2. RX I-Q Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38

5.3. Programmable Gain Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38

5.4. ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.5. Digital Modem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.6. Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39

5.7. Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.8. Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

5.9. Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6. Data Handling and Packet Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

6.1. RX and TX FIFOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

6.2. Packet Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

6.3. Packet Handler TX Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44

6.4. Packet Handler RX Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44

6.5. Data Whitening, Manchester Encoding, and CRC . . . . . . . . . . . . . . . . . . . . . . . . . . 47

6.6. Preamble Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

6.7. Preamble Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

6.8. Invalid Preamble Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

6.9. TX Retransmission and Auto TX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

7. RX Modem Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Preliminary Rev. 0.4

Si4431

7.1. Modem Settings for FSK and GFSK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

7.2. Modem Settings for OOK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52

8. Auxiliary Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

8.1. Smart Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55

8.2. Microcontroller Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56

8.3. General Purpose ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

8.4. Temperature Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60

8.5. Low Battery Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62

8.6. Wake-Up Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

8.7. Low Duty Cycle Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

8.8. GPIO Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

8.9. Antenna-Diversity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

8.10. RSSI and Clear Channel Assessment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

9. Reference Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69

10. Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

11. Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

11.1. Crystal Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

11.2. Layout Practice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

11.3. Matching Network Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

12. Reference Material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

12.1. Complete Register Table and Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

13. Pin Descriptions: Si4431 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .155

14. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156

15. Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157

Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .158

Preliminary Rev. 0.4

Si4431

IST

IGURES

Figure 1. Si4431 RX/TX Direct-Tie Application Example .......................................................... 17

Figure 2. SPI Timing.................................................................................................................. 19

Figure 3. SPI Timing—READ Mode ..........................................................................................20

Figure 4. SPI Timing—Burst Write Mode .................................................................................. 20

Figure 5. SPI Timing—Burst Read Mode .................................................................................. 20

Figure 6. State Machine Diagram.............................................................................................. 21

Figure 7. TX Timing................................................................................................................... 25

Figure 8. RX Timing .................................................................................................................. 26

Figure 9. Frequency Deviation .................................................................................................. 30

Figure 10. Sensitivity at 1% PER vs. Carrier Frequency Offset ................................................31

Figure 11. FSK vs GFSK Spectrums......................................................................................... 34

Figure 12. Direct Synchronous Mode Example......................................................................... 36

Figure 13. Direct Asynchronous Mode Example ....................................................................... 36

Figure 14. FIFO Mode Example ................................................................................................ 37

Figure 15. PLL Synthesizer Block Diagram............................................................................... 39

Figure 16. FIFO Thresholds ...................................................................................................... 42

Figure 17. Packet Structure....................................................................................................... 43

Figure 18. Multiple Packets in TX Packet Handler .................................................................... 44

Figure 19. Required RX Packet Structure with Packet Handler Disabled ................................. 44

Figure 20. Multiple Packets in RX Packet Handler.................................................................... 44

Figure 21. Multiple Packets in RX with CRC or Header Error ................................................... 45

Figure 22. Operation of Data Whitening, Manchester Encoding, and CRC .............................. 47

Figure 23. POR Glitch Parameters............................................................................................ 55

Figure 24. General Purpose ADC Architecture ......................................................................... 57

Figure 25. ADC Differential Input Example—Bridge Sensor ..................................................... 58

Figure 26. ADC Differential Input Offset for Sensor Offset Coarse Compensation................... 59

Figure 27. Temperature Ranges using ADC8 ........................................................................... 61

Figure 28. WUT Interrupt and WUT Operation.......................................................................... 64

Figure 29. Low Duty Cycle Mode .............................................................................................. 65

Figure 30. RSSI Value vs. Input Power..................................................................................... 68

Figure 31. Split RF I/Os with Separated TX and RX Connectors—Schematic ......................... 69

Figure 32. Split RF I/Os with Separated TX and RX Connectors—Top .................................... 71

Figure 33. Split RF I/Os with Separated TX and RX Connectors—Top Silkscreen .................. 71

Figure 34. Split RF I/Os with Separated TX and RX Connectors—Bottom............................... 72

Figure 35. Sensitivity vs. Data Rate ..........................................................................................73

Figure 36. Receiver Selectivity.................................................................................................. 74

Figure 37. TX Modulation (40 kbps, 20 kHz Deviation)............................................................. 75

Figure 38. TX Unmodulated Spectrum (917 MHz) .................................................................... 75

Figure 39. TX Modulated Spectrum (917 MHz, 40 kbps, 20 kHz Deviation, GFSK) ................. 76

Figure 40. Synthesizer Settling Time for 1 MHz Jump Settled within 10 kHz ........................... 76

Figure 41. Synthesizer Phase Noise (VCOCURR = 11) ........................................................... 77

Figure 42. RX LNA Matching..................................................................................................... 79

Figure 43. TX Matching and Filtering for Different Bands ......................................................... 79

Preliminary Rev. 0.4

SI4432-V2-FM Related Products

	SI4432-V2-FM	SI4430-A0-FM	SI4431-A0-FM
Description	IC txrx ism 930mhz 3.6V 20-qfn	IC txrx ism 930mhz 3.6V 20-qfn	IC txrx ism 930mhz 3.6V 20-qfn
Standard Package	-	75	75
Category	-	RF/IF and RFID	RF/IF and RFID
Family	-	RF Transceivers	RF Transceivers
Packaging	-	Tube	Tube
Frequency	-	900MHz ~ 960MHz	240MHz ~ 930MHz
Data Rate (Max)	-	128kbps	128kbps
Modulation or Protocol	-	FSK, GFSK, OOK	FSK, GFSK, OOK
Applications	-	General Purpose	General Purpose
Power - Outpu	-	13dBm	13dBm
Sensitivity	-	-118dBm	-118dBm
Voltage - Supply	-	1.8 V ~ 3.6 V	1.8 V ~ 3.6 V
Current - Receiving	-	18.5mA	18.5mA
Current - Transmitting	-	28mA	28mA
Data Interface	-	PCB, Surface Mou	PCB, Surface Mou
Antenna Connec	-	PCB, Surface Mou	PCB, Surface Mou
Operating Temperature	-	-40°C ~ 85°C	-40°C ~ 85°C
Package / Case	-	20-VFQFN Exposed Pad	20-VFQFN Exposed Pad
Other Names	-	336-1632-5	336-1633-5

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