OM1895
Simmerstat control IC
1
FEATURES
range of applications, extending from the zero-crossing
control of a heating element, a fan motor and other
complex loads.
Because the operation of the OM1895 uses characteristics
of triacs which are common to typical triacs, but may show
some variation in triacs designed to emphasise specific
uncommon features, it is preferable to use triacs which
have been characterized and specified as suitable for use
in this application.
The triac firing circuit uses a unique circuit arrangement by
which load current zero crossing is detected, and a
widened gate pulse applied during the critical current zero
crossing period. Triac conduction is therefore maintained
throughout the zero crossing time, ensuring that rfi
transients are not generated during this time. With
inductive loads only the final half cycle that ends an ON
period (made up of an odd number of mains half cycles),
will finish with a voltage transient. This may still need a
snubber network to limit dv/dt, although it will not be
required for the consecutive conducting half cycles during
the ON time.
•
rfi elimination triac drive circuit
•
Low external component count
•
Low supply current required
•
Variable ON and OFF cycle times
•
External ON/OFF triac control available
•
No DC component in the AC mains supply
•
The ON period always has an odd number of half cycles,
and the OFF period an even number
•
Gate pulse width may be externally set
•
Negative triac gate drive (avoids insensitive quadrant
operation)
•
Versions available with slower cycle times to meet EMC
flicker regulations
2
GENERAL DESCRIPTION
The OM1895 is a precision low power simmerstat control
IC for triggering a triac in applications where variable ON
and OFF cycle time is required. It is suitable for a broad
3
BLOCK DIAGRAM
R2
220kΩ
LOAD
Triac
BT208X
-600E
22nF
250
Vac
AC
220V
Common
MODE
V
CC
PWR Reset
OM1895
RV1
470kΩ
Pot
3
7
1
Power
Supply
8
Gate
Sensing
6
TRG
R3
300Ω
2
Ramp
Generator
Mode
logic
Zero-crossing
Timing and
Synchronisation
Gate
Drive
C2
100uF
16V
4
V
EE
5
PX
R1
470kΩ
C1
100pF
block1895
Fig.1 Block diagram
© 2006 Integrated Electronic Solutions Pty Ltd. trading as
Hendon Semiconductors, all rights reserved.
Contents are subject to the Disclaimer
2007 Apr 19, Revision 2.0
1
Product Specification
OM1895
Simmerstat control IC
4
4.1
PINNING INFORMATION
Pinning layout
4.2
Pin description
PIN
1
2
3
4
5
6
7
8
DESCRIPTION
AC line sense and power input
Control input, triac ON/OFF
Triac ON/OFF & function
Negative supply
Gate pulse extender
Triac gate drive
Positive Common
Reset input/output
SYMBOL
PWR
POT
PWR
1
8
RESET
VCC
TRG
MODE
VEE
PX
TRG
VCC
RESET
POT
2
7
OM1895
MODE
VEE
3
6
4
5
PX
pin1895
Fig.2 Pin configuration
5
5.1
FUNCTIONAL DESCRIPTION
V
CC
−
Common, positive DC
supply
The positive DC supply rail for the
control IC type OM1895 is used as
the common reference. This is always
connected to the T1 terminal of the
triac, and being the positive supply
rail allows negative gate drive to the
triac in both positive and negative
supply half cycles on T2. By driving
the triac in this way the insensitive
quadrant (negative T2 voltage, and
positive gate triggering signal) of
triacs is avoided.
5.2
V
EE
−
Negative DC supply,
substrate
capacitor needs to be sufficiently
large to maintain the operating
voltage during the half cycle when it is
not being charged, as well as to
provide the energy to drive the triac
gate during the gate pulse.
Internal supply sensing prevents the
commencement of an ON cycle while
the voltage is too low for reliable
circuit operation. If during an ON
cycle the supply voltage falls below
this level the ON cycle will terminate
at the first opportunity consistent with
the logic cycle algorithm.
5.3
PWR
−
Power supply and
synchronisation from the
mains supply line
indicate the phase and magnitude of
the signal on the AC supply. Three
states, positive, zero and negative, of
this signal is recognised for
synchronisation of the triggering
times to the mains.
See Figure 3, OM1895 Power Supply
Circuit.
The PWR pin is driven by a current
limiting resistor from the mains
supply. During the positive half cycle
current flows through the upper diode
D1 to the positive common rail, while
on a negative half cycle the current
flows through the lower diode D2, and
charges the V
EE
power supply
capacitor.
This pin connects to the substrate and
the internally generated and
regulated negative DC supply, and
should be bypassed to V
CC
(common)
by a capacitor of typically 100
µF.
The
2007 Apr 19, Revision 2.0
The PWR input provides both a
synchronisation signal for the logic
functions of the OM1895, as well as
the DC current used to provide the
power supply from which the OM1895
is powered. Signals are derived which
2
Product Specification
OM1895
Simmerstat control IC
V
SS
-
D1
T
p
+
PWR
-
D2
+
T
n
V
EE
psp1895
Fig.3 OM1895 power supply circuit
The zero crossing is signalled by the
two comparators, the output signals
of which indicate whether the mains
voltage is above the common rail
voltage, or below the negative V
EE
.
There may be additional resistors in a
simple network from the AC supply
and V
EE
to adjust these zero-crossing
signals to provide a symmetrical
response in the positive as well as the
negative going direction.
As the AC signal passes through
zero, comparators provide control
signals Tp (when V
PWR
> V
CC
) and
Tn (when V
PWR
< V
EE
) indicating
whether the voltage on PWR pin is
greater or less than V
CC
or V
EE
respectively. A resistor network
ensures that these switching points
correspond to equal positive or
negative thresholds about the AC
zero thus giving symmetrical
zero-crossing information to the
synchronisation and logic circuit.
Synchronisation is obtained from the
threshold comparators at the levels of
V
CC
and V
EE
on the chip.
Adjustment of the initial switching
point, and hence the time of initiation
of the first firing pulse, and its
symmetry about the zero crossing
point, is possible by varying the
values of the resistors connected
between PWR and the active supply,
a resistor to V
EE
, and a resistor to
V
CC
.
When the triac has switched on, the
zero-crossing synchronisation
information is derived from the
voltage on the triac gate while it is
conducting, although the polarity
information provided by the PWR
input signal continues to provide
phase information to enable the ON
and OFF transitions at the start and
finish of an ON burst of conducting
half cycles, to be synchronised to
prevent repeated firing in the same
polarity half cycle, and a resultant net
DC load current.
5.4
RESET /Ext_Reset status
and control
initial state until the voltage has risen
to a sufficient value to sustain full
operation.
The reset signal is active high to
preserve a predictable voltage
relationship with the Common supply
rail (V
CC
) rather than V
EE
. The
RESET pin is pulled high by 50µA
when the internal reset signal is
active. When the power supply
voltage reaches its normal regulated
level, the RESET pin is pulled low
(6µA), and the controller then begins
normal operation.
This reset signal can be used to reset
counters and other electronic logic
circuits which need to begin operation
in a known state.
Furthermore, when OM1895s are
used in parallel, or with other control
circuits, an external reset signal can
be applied which will override these
internally generated signals.
As the power supply rises towards its
operating voltage, a reset signal is
generated which holds the logic in an
3
Product Specification
2007 Apr 19, Revision 2.0
OM1895
Simmerstat control IC
5.5
MODE
−
external triac
ON/OFF, or function
5.6
POT
−
Triac drive control
input
than or is equal to the reference
voltage.
Additional cycling period can be
achieved to extend the triac ON/OFF
period by grounding the appropriate
ZAP1 and ZAP2 internal pins to V
EE
.
ZAP1 and ZAP2 internal pins are
permanently wired during pretest.
When ZAP1, ZAP2 pins are not
connected, cycling time is 0.64
seconds. If ZAP1 pin not connected
and ZAP2 pin is connected to V
EE
,
cycling time is 5.12 seconds. While if
ZAP1 pin is connected to V
EE
and
ZAP2 pin not connected, cycling time
is 40.96 seconds. Finally, if ZAP1 and
ZAP2 pins are both connected to V
EE,
cycling time is 327.68 seconds or
5.46 minutes.
The mode pin is an external triac
ON/OFF control input, and has three
active states.
When MODE pin is connected to
either V
CC
(held high) or V
EE
(held
low), then the triac is turned ON and
OFF respectively. Irrespective of the
control input on POT pin. Figure 5
shows the MODE functions against
voltage graphically.
When MODE pin is not connected,
the OM1895 uses the control input
(POT) to turn the triac ON/OFF.
When POT pin is connected to V
CC,
then the triac is turned ON 100%.
When POT pin is left unconnected or
is connected to 1.2V with respect to
V
EE,
then the triac is fully OFF.
Figure 4 shows the characteristic of
duty cycle against POT voltage.
The OM1895 generates an internal
reference voltage signal which
consists of 32 voltage levels, ranging
from typically 7.79V down to 1.3V
(2Vbe) with respect to V
EE
. The
OM1895 compares the generated
reference voltage signal with the
voltage signal set on the POT pin,
which turns the triac ON when the
voltage set on POT pin is greater than
the reference voltage, and OFF when
the voltage set on POT pin is less
100%
75%
Fig.4 OM1895 POT pin input voltage versus duty cycle characteristic
2007 Apr 19, Revision 2.0
4
Product Specification
OUTPUT DUTY CYCLE
50%
25%
0
-8.0V
VEE
2*VBE
-6.7V
-6V
-4V
-2V
0V
VCC
POTENTIOMETER INPUT VOLTAGE (POT pin) V
OM1895
Simmerstat control IC
The voltage signals on POT and
MODE pins will switch the triac ON or
OFF in a manner which is
synchronised to the mains zero
crossings. These signals may change
at any time, but the triac will only be
switched ON or permitted to turn
OFF, at a time that is consistent with
controlling it at the first available
opportunity consistent with the cycling
algorithm which triggers the triac for
an odd number cycles in each ON
period, and lets it remain OFF for and
even number of half cycles. In this
way there is no DC current present in
the mains supply when it is averaged
over a large number of ON cycles and
at the same time for inductive loads, a
new ON period begins on a half wave
of the opposite polarity to the start
and finish half wave of the previous
run cycle.
5.7
TRG
−
Triac gate drive
crossing determined from the mains
supply, this is not possible when the
load is inductive (for example, when it
is a motor). The current is no longer in
phase with the supply voltage, and
can reach zero at a time significantly
lagging the supply voltage phase.
In the OM1895, the voltage of the
triac gate has been found to provide
an indicator of imminent zero
crossing, and with an appropriate
threshold circuit, the gate drive can be
re-applied before the triac turns fully
off. Again the gate pulse is
determined by the length of the
internal delay circuit, plus any
additional delay from the application
of external resistor and capacitors
applied in parallel from the pin PX to
V
EE
5.8
PX
−
triac gate pulse width
external setting
extended time, set by the RC network
on the PX pin, whichever is greater.
The triac gate output drives the gate
through an external current setting
resistor. It has in-built protection to
withstand transient voltage signals
which may be induced on the gate of
the triac by mains transients during
firing. The gate drive current should
be set to a value suited to the gate
sensitivity of the triac used. The firing
pulse width will need to be of such a
width that the specified latching
current of the triac when used with the
design load has been reached before
the gate pulse ends.
In the OM1895 the gate drive is first
applied at the start of an ON period at
the zero crossing of the mains supply.
The leading edge of this obtained
from the signal derived from the PWR
resistor network before the falling
mains voltage reaches zero.
On this first half cycle current is
flowing in the triac, and subsequent
zero crossings of the triac can be
determined in another way. While a
resistive load may have the zero
2007 Apr 19, Revision 2.0
The gate pulse must be wide enough
to be applied from the time the triac is
about to turn off until the increasing
current in the triac in the opposite
direction has reached the latching
current of the triac being used.
While there is a time delay circuit
within the OM1895 to provide a
minimum gate pulse width of typically
100µs, for lower powered loads,
where it takes longer for the load
current to reach the triac latching
current, then it may be necessary to
extend the gate pulse.
A parallel resistor and capacitor are
connected from pin PX (pulse
extender) to V
EE
giving a pulse
extension time of:
t
pw
≈
1.4
⋅
R
⋅
C
(
s
)
The gate pulse is applied for a time
determined by either the internal
delay time of typically 100µs or the
5
Product Specification
京公网安备 11010802033920号
EEWORLD
