EEWORLDEEWORLDEEWORLD

Part Number

Search

A54SX32A-FGG256M

Description
fpga - field programmable gate array 32k system gates
Categorysemiconductor    Other integrated circuit (IC)   
File Size437KB,50 Pages
ManufacturerActel
Websitehttp://www.actel.com/
Environmental Compliance
Download Datasheet Parametric View All

A54SX32A-FGG256M Online Shopping

Suppliers Part Number Price MOQ In stock  
A54SX32A-FGG256M - - View Buy Now

A54SX32A-FGG256M Overview

fpga - field programmable gate array 32k system gates

A54SX32A-FGG256M Parametric

Parameter NameAttribute value
MakerActel
Product CategoryFPGA - Field Programmable Gate Array
RoHSyes
Processor seriesA54SX32
coreIP Core
Number of gates48000
Large battery quantity1800
Maximum operating frequency238 MHz
Number of programmable input/output terminals203
delay1.2 ns
Supply voltage (maximum)5.25 V
Maximum operating temperature+ 125 C
Minimum operating temperature- 55 C
Package/boxFBGA
EncapsulationTray
Installation styleSMD/SMT
Supply voltage (minimum)2.25 V
v2.0
HiRel SX-A Family FPGAs
Features and Benefits
Leading Edge Performance
215 MHz System Performance (Military Temperature)
5.3 ns Clock-to-Out (Pin-to-Pin) (Military Temperature)
240 MHz Internal Performance (Military Temperature)
Actel Secure Programming Technology with
FuseLock™ Prevents Reverse Engineering and Design
Theft
Cold-Sparing Capability
Individual Output Slew Rate Control
QML Certified Devices
100% Military Temperature Tested (–55°C to +125°C)
33 MHz PCI Compliant
CPLD and FPGA Integration
Single-Chip Solution
Configurable I/O Support for 3.3 V/5 V PCI, LVTTL,
and TTL
Configurable Weak Resistor Pull-Up or Pull-Down for
Tristated Outputs during Power-Up
Up to 100% Resource Utilization and 100% Pin
Locking
2.5 V, 3.3 V, and 5 V Mixed Voltage Operation with
5 V Input Tolerance and 5 V Drive Strength
Very Low Power Consumption
Deterministic, User-Controllable Timing
Unique In-System Diagnostic and Verification
Capability with Silicon Explorer II
Boundary-Scan Testing in Compliance with IEEE
1149.1 (JTAG)
A54SX32A
32,000
48,000
2,880
1,800
1,080
1,980
228
3
0
Yes
Yes
5.3 ns
0 ns
Std, –1
84, 208, 256
A54SX72A
72,000
108,000
6,036
4,024
2,012
4,024
213
3
4
Yes
Yes
6.7 ns
0 ns
Std, –1
208, 256
Specifications
48,000 to 108,000 Available System Gates
Up to 228 User-Programmable I/O Pins
Up to 2,012 Dedicated Flip-Flops
0.25/0.22 µ CMOS Process Technology
Features
Hot-Swap Compliant I/Os
Power-Up/Down Friendly (no sequencing required
for supply voltages)
Class B Level Devices
Three Standard Hermetic Package Options
Product Profile
Device
Capacity
Typical Gates
System Gates
Logic Modules
Combinatorial Cells
Register Cells
Dedicated Flip-Flops
Maximum Flip-Flops
Maximum User I/Os
Global Clocks
Quadrant Clocks
Boundary-Scan Testing
3.3 V / 5 V PCI
Clock-to-Out
Input Set-Up (External)
Speed Grades
Package (by Pin Count)
CQFP
N o ve m b e r 2 0 0 6
© 2006 Actel Corporation
i
See the Actel website for the latest version of the datasheet.
Based on the DS18B20 multi-channel temperature alarm paper, what's missing is a matrix keyboard. Who has it?
I. Mission and ObjectivesDesign content:In order to measure and detect multiple temperature values, the main system is required to connect multiple temperature sensors. Since the free pins on the conn...
zhangfanday 51mcu
Help: Why can't CHIPSCOPE capture some signals? ?
Hello everyone, I use Xilinx FPGA. When I use Chip scope to capture signals, why can't I capture some intermediate signals? There is no connection of these signals in Analyzer. Why is this? Do I need ...
zhangbit FPGA/CPLD
Study lm3s8962 adc experiment
I kept making mistakes when writing the ADC code yesterday, but I succeeded later based on the sample code uploaded by a friend. Reference the code and display the output of ADC on the oled screen #in...
ssawee Microcontroller MCU
Special offer for sale of privileged students' SF-CY3 FPGA Cyclone III development board
Special offer for sale of privileged students' SF-CY3 FPGA Cyclone III development board [url]http://2.taobao.com/item.htm?id=41416905113&spm=686.1000925.1000774.13.HwImuq&mt=[/url]...
yts1213 Buy&Sell
How is overcurrent protection implemented in DCDC?
I have always been puzzled by this question. As we all know, accurate measurement often requires sampling resistors. However, in many DCDC controllers, the setting resistor for overcurrent protection ...
wstt Analogue and Mixed Signal
ZigBee multicast sending and receiving issues
My program only sends 30 bytes at a time, 10 times per second, but the coordinator can only receive once every 340ms; please give me some advice, thank you...
小兵小将 RF/Wirelessly

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1117  1170  33  2001  1729  23  24  1  41  35 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号