74LVCH16244AEV-S datasheet, PDF

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74LVCH16244AEV-S: DescriptionBuffers and line drivers 3.3V buf/LN drvr N-inv bush 3S; Categorylogic logic; File Size176KB，19 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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74LVCH16244AEV-S Overview

Buffers and line drivers 3.3V buf/LN drvr N-inv bush 3S

74LVCH16244AEV-S Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	NXP
package instruction	FBGA, BGA56,6X10,25
Reach Compliance Code	unknow
Control type	ENABLE LOW
JESD-30 code	R-PBGA-B56
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.024 A
Number of digits	4
Number of functions	4
Number of terminals	56
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	FBGA
Encapsulate equivalent code	BGA56,6X10,25
Package shape	RECTANGULAR
Package form	GRID ARRAY, FINE PITCH
method of packing	TRAY
power supply	3.3 V
Prop。Delay @ Nom-Su	5.5 ns
Certification status	Not Qualified
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	BALL
Terminal pitch	0.635 mm
Terminal location	BOTTOM
Base Number Matches	1

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74LVC16244A; 74LVCH16244A

16-bit buffer/line driver; 5 V input/output tolerant; 3-state

Rev. 09 — 18 March 2010

Product data sheet

1. General description

The 74LVC16244A; 74LVCH16244A are 16-bit non-inverting buffer/line drivers with

3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit

buffers or one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each

controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a

high-impedance OFF-state.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices in mixed

3.3 V and 5 V applications.

The 74LVCH16244A bus hold on data inputs eliminates the need for external pull-up

resistors to hold unused inputs.

2. Features and benefits

5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Multibyte flow-through standard pin-out architecture

Low inductance multiple power and ground pins for minimum noise and ground

bounce

Direct interface with TTL levels

High-impedance when V

= 0 V

All data inputs have bus hold. (74LVCH16244A only)

Complies with JEDEC standard JESD8-B / JESD36

ESD protection:

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

Specified from

−40 °C

to +85

°C

and

−40 °C

to +125

°C

74LVCH16244AEV-S Related Products

	74LVCH16244AEV-S	74LVC16244ADGG,518	74LVC16244ADGG,512	74LVC16244ABQ,518	935288048515	935288047518
Description	Buffers and line drivers 3.3V buf/LN drvr N-inv bush 3S	Buffer and line driver 3.3V 16-bit drvr 3-S	Buffer and line driver 3.3V 16-bit drvr 3-S	IC BUF NON-INVERT 3.6V 60HXQFN	LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PBCC60, 4 X 6 MM, 0.55 MM PITCH, PLASTIC, SOT1134-1, HXQFN-60	LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PBCC60, 4 X 6 MM, 0.55 MM PITCH, PLASTIC, SOT1134-1, HXQFN-60
Maker	NXP	NXP	NXP	NXP	NXP	NXP
package instruction	FBGA, BGA56,6X10,25	TSSOP, TSSOP48,.3,20	TSSOP, TSSOP48,.3,20	VBCC, LCC(UNSPEC)	HVBCC,	HVBCC,
Reach Compliance Code	unknow	unknow	unknow	compliant	unknown	unknown
JESD-30 code	R-PBGA-B56	R-PDSO-G48	R-PDSO-G48	R-PBCC-B60	R-PBCC-B60	R-PBCC-B60
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
Number of digits	4	4	4	4	4	4
Number of functions	4	4	4	4	4	4
Number of terminals	56	48	48	60	60	60
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	FBGA	TSSOP	TSSOP	VBCC	HVBCC	HVBCC
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, FINE PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	CHIP CARRIER, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Nominal supply voltage (Vsup)	3.3 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal form	BALL	GULL WING	GULL WING	BUTT	BUTT	BUTT
Terminal pitch	0.635 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	BOTTOM	DUAL	DUAL	BOTTOM	BOTTOM	BOTTOM
Is it Rohs certified?	incompatible	conform to	conform to	conform to	-	-
Control type	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW	-	-
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	-	-
MaximumI(ol)	0.024 A	0.024 A	0.024 A	0.024 A	-	-
Encapsulate equivalent code	BGA56,6X10,25	TSSOP48,.3,20	TSSOP48,.3,20	LCC(UNSPEC)	-	-
method of packing	TRAY	TAPE AND REEL	TUBE	TAPE AND REEL	-	-
power supply	3.3 V	3.3 V	3.3 V	3.3 V	-	-
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	-	-
Base Number Matches	1	1	1	1	-	-
series	-	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
length	-	12.5 mm	12.5 mm	6 mm	6 mm	6 mm
Number of ports	-	2	2	2	2	2
propagation delay (tpd)	-	6 ns	6 ns	6 ns	6 ns	6 ns
Maximum seat height	-	1.2 mm	1.2 mm	0.5 mm	0.5 mm	0.5 mm
Maximum supply voltage (Vsup)	-	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	-	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
width	-	6.1 mm	6.1 mm	4 mm	4 mm	4 mm

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