R5F52201BGFL#V0 datasheet, PDF

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R5F52201BGFL#V0: DescriptionMicrocontroller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，107 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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R5F52201BGFL#V0 Overview

Microcontroller

R5F52201BGFL#V0 Parametric

Parameter Name	Attribute value
Objectid	7203384503
package instruction	,
Reach Compliance Code	compliant
YTEOL	1.48
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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Datasheet

RX220 Group

Renesas MCUs

R01DS0130EJ0110

Rev.1.10

Dec 20, 2013

32-MHz 32-bit RX MCUs, 49 DMIPS, up to 256-KB flash memory,

12-bit A/D, ELC, MPC, IrDA, RTC, up to 7 comms channels;

incorporating functions for IEC60730 compliance

Features

■

32-bit RX CPU core



Max. operating frequency: 32 MHz



Capable of 49 DMIPS in operation at 32 MHz



Accumulator handles 64-bit results (for a single

instruction) from 32- × 32-bit operations



Multiplication and division unit handles 32- × 32-bit

operations (multiplication instructions take one CPU

clock cycle)



Fast interrupt



CISC Harvard architecture with 5-stage pipeline



Variable-length instructions, ultra-compact code



On-chip debugging circuit

■

Low-power design and architecture



Operation from a single 1.62-V to 5.5-V supply



1.62-V operation available (at up to 8 MHz)



Three low-power modes

■

On-chip flash memory for code, no wait states



32-MHz operation, 31.25-ns read cycle



No wait states for reading at full CPU speed



Up to 256-Kbyte capacity



User code programmable via the SCI



Programmable at 1.62 V



For instructions and operands

■

On-chip data flash memory



8 Kbytes (Number of times of reprogramming: 100,000)



Erasing and programming impose no load on the CPU.

■

On-chip SRAM, no wait states



Up to 16-Kbyte size capacity

■

DMA



DMAC: Incorporates four channels



DTC: Four transfer modes

■

ELC



Module operation can be initiated by event signals

without going through interrupts.



Modules can operate while the CPU is sleeping.

■

Reset and supply management



Seven types of reset, including the power-on reset (POR)



Low voltage detection (LVD) with voltage settings

■

Clock functions



Frequency of external clock: Up to 20 MHz



Frequency of the oscillator for sub-clock generation:

32.768 kHz



On-chip low- and high-speed oscillators, dedicated on-

chip low-speed oscillator for the IWDT



Generation of a dedicated 32.768-kHz clock for the RTC



Clock frequency accuracy measurement circuit (CAC)

■

Real-time clock



Adjustment functions (30 seconds, leap year, and error)



Year and month display or 32-bit second display (binary

counter) is selectable

PLQP0100KB-A

PLQP0064KB-A

PLQP0048KB-A

PLQP0064GA-A

14 × 14 mm, 0.5-mm pitch

10 × 10 mm, 0.5-mm pitch

7 × 7 mm, 0.5-mm pitch

14 × 14 mm, 0.8-mm pitch

■

Independent watchdog timer



125-kHz on-chip oscillator produces a dedicated clock

signal to drive IWDT operation.

■

Useful functions for IEC60730 compliance



Self-diagnostic and disconnection-detection assistance

functions for the A/D converter, clock-frequency

accuracy-measurement circuit, independent watchdog

timer, functions to assist in RAM testing, etc.

■

Up to seven communications channels



SCI with many useful functions (up to five channels)

Asynchronous mode, clock synchronous mode, smart

card interface mode



IrDA Interface (one channel, in cooperation with the

SCI5)



C bus interface: Transfer at up to 400 kbps, capable of

SMBus operation (one channel)



RSPI (one channel)

■

Up to 14 extended-function timers



16-bit MTU: input capture, output capture,

complementary PWM output, phase counting mode

(six channels)



8-bit TMR (four channels)



16-bit compare-match timers (four channels)

■

12-bit A/D converter



Capable of conversion within 1.56

μs



Self-diagnostic function and analog input disconnection

detection assistance function

■

Analog comparator

■

General I/O ports



5-V tolerant, open drain, input pull-up, switching of

driving ability

■

MPC



Multiple locations are selectable for I/O pins of

peripheral functions

■

Operating temp. range

 40C

to +85C

 40C

to +105C

R01DS0130EJ0110 Rev.1.10

Dec 20, 2013

Page 1 of 105

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