D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
FST34170 17-Bit to 34-Bit Multiplexer/Demultiplexer Bus Switch
October 2000
Revised January 2005
FST34170
17-Bit to 34-Bit Multiplexer/Demultiplexer Bus Switch
General Description
The Fairchild Switch FST34170 is a 17-bit to 34-bit high-
speed CMOS TTL-compatible multiplexer/demultiplexer
bus switch. The low on resistance of the switch allows
inputs to be connected to outputs without adding propaga-
tion delay or generating additional ground bounce noise.
The device can be used in applications where two buses
need to be addressed simultaneously. The FST34170 is
designed so that the A Port demultiplexes into B
1
or B
2
or
both.
Two select (SEL
1
, SEL
2
) inputs provide switch enable con-
trol.
Features
■
Slower Output Enable times prevent signal disruption
■
4
:
switch connection between two ports
■
Low l
CC
■
Zero bounce in flow-through mode
■
Control inputs compatible with TTL level
■
See Applications Note AN-5008 for details
■
Minimal propagation delay through the switch
Ordering Code:
Order Number
FST34170MTD
(Note 1)
FST34170MTDX_NL
(Note 2)
Package
Number
MTD56
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pb-Free 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
6.1mm Wide
Note 1:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 2:
“_NL” indicates Pb-Free product (per JEDEC J-STD-020B). Device is available in Tape and Reel only.
UHC
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500450
www.fairchildsemi.com
FST34170
Logic Diagram
Connection Diagram
Truth Table
Inputs
SEL
1
L
H
L
H
SEL
2
H
L
L
H
xA
Function
xA
xA
x B
1
x B
2
Pin Descriptions
Pin Name
SEL
1
, SEL
2
A
B
1
, B
2
Description
Select Inputs
Bus A
Bus B
x B
1
and x B
2
Switch Open
www.fairchildsemi.com
2
FST34170
Absolute Maximum Ratings
(Note 3)
Supply Voltage (V
CC
)
0.5V to
7.0V
0.5V to
7.0V
DC Switch Voltage (V
S
) (Note 4)
DC Input Control Pin Voltage
DC Input Diode Current (l
IK
) V
IN
0V
DC Output Current (I
OUT
)
DC V
CC
/GND Current (I
CC
/I
GND
)
Storage Temperature Range (T
STG
)
(V
IN
) (Note 5)
Recommended Operating
Conditions
(Note 6)
Power Supply Operating (V
CC
)
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
Input Rise and Fall Time (t
r
, t
f
)
Switch Control Input
Switch I/O
Free Air Operating Temperature (T
A
)
0nS/V to 5nS/V
0nS/V to DC
4.0V to 5.5V
0V to 5.5V
0V to 5.5V
0.5V to
7.0V
50 mA
/
100 mA
65
q
C to
150
q
C
128 mA
40
q
C to
85
q
C
Note 3:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 4:
V
S
is the voltage observed/applied at either the A or B Ports across
the switch.
Note 5:
The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 6:
Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
T
A
Symbol
Parameter
V
CC
(V)
V
IK
V
IH
V
IL
I
I
I
OZH
, I
OZL
I
OZH
, I
OZL
R
ON
Clamp Diode Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
Input Leakage Current
OFF-STATE Leakage Current
OFF-STATE Leakage Current
Switch On Resistance
(Note 8)
4.5
4.0–5.5
4.0–5.5
5.5
0
5.5
5.5
4.5
4.5
4.5
4.0
I
CC
Quiescent Supply Current
Increase in I
CC
per Input
5.0V and T
A
40
q
C to
85
q
C
Typ
(Note 7)
Max
Units
Conditions
Min
1.2
2.0
0.8
V
V
V
I
IN
18mA
r
1.0
10
P
A
P
A
P
A
P
A
:
:
:
:
P
A
mA
0
d
V
IN
d
5.5V
V
IN
5.5V
0
d
A,
d
V
CC
, V
0
d
B,
d
V
CC
, V
V
IN
V
IN
V
IN
V
IN
V
IN
0V, I
IN
0V, I
IN
2.4V, I
IN
2.4V, I
IN
64 mA
30 mA
15 mA
15 mA
0
r
1.0
r
1.0
4
4
8
11
7
7
14
20
3
2.5
5.5
5.5
V
CC
or GND, I
OUT
'
I
CC
One input at 3.4V
Other inputs at V
CC
or GND
Note 7:
Typical values are at V
CC
25
q
C
Note 8:
Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
www.fairchildsemi.com
FST34170
AC Electrical Characteristics
T
A
Symbol
Parameter
V
CC
Min
t
PHL
, t
PLH
t
PZH
t
PZL
t
PHZ
t
PLZ
A or B, to B or A (Note 9)
Output Enable Time,
SEL to A, B
Output Enable Time,
SEL to A, B
Output Disable Time,
SEL to A, B
Output Disable Time,
SEL to A, B
7.0
7.0
1.0
1.0
C
L
40
q
C to
85
q
C,
500
:
4.0V
Max
0.25
35.0
35.0
7.3
7.7
ns
ns
ns
ns
ns
V
I
V
I
V
I
V
I
V
I
OPEN
OPEN for t
PZH
7V for t
PZL
OPEN for t
PHZ
7V for t
PLZ
Figures 1, 2
Figures 1, 2
Figures 1, 2
Figures 1, 2
Figures 1, 2
Units
Conditions
Figure No.
V
CC
Min
50 pF, RU RD
4.5
5.5V
Max
0.25
30.0
30.0
6.9
7.7
Note 9:
This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
C
IN
C
I/O OFF
Note 10:
T
A
(Note 10)
Typ
4
8
Max
Units
pF
pF
V
CC
V
CC
Conditions
5.0V
5.0V, Switch OFF
Parameter
Control Pin Input Capacitance
Input/Output Capacitance “OFF State”
25
q
C, f
1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note:
Input driven by 50
:
source terminated in 50
:
Note:
C
L
includes load and stray capacitance, C
L
Note:
Input PRR
1.0 MHz, t
W
500 ns
50 pF
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
www.fairchildsemi.com
4