74F827
10-bit buffer/line driver; non-inverting; 3-state
Rev. 04 — 29 January 2010
Product data sheet
1. General description
The 74F827 10-bit buffer, provides high performance bus interface buffering for wide
data/address paths or buses carrying parity. The device has NOR output enables (OE0,
OE1) for maximum control flexibility.
2. Features
I
High impedance NPN base inputs for reduced loading (20
µA
input current in HIGH
and LOW states)
I
I
IL
= 20
µA
compared to 600
µA
in FAST family specification
I
Ideal for high speed, light bus loading with increased fan-in
I
Controlled rise and fall times to minimize ground bounce
I
Glitch-free power-up in 3-state
I
Flow-through pinout architecture for microprocessor oriented applications
I
Output sink capability, I
OL
= 64 mA
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
N74F827D
N74F827DB
0
°C
to 70
°C
0
°C
to 70
°C
SO24
SSOP24
Description
plastic small outline package; 24 leads;
body width 7.5 mm
plastic shrink small outline package; 24 leads;
body width 5.3 mm
Version
SOT137-1
SOT340-1
Type number
NXP Semiconductors
74F827
10-bit buffer/line driver; non-inverting; 3-state
4. Functional diagram
1
13
&
EN1
2
3
4
5
6
7
8
9
10 11
2
3
1
23
22
21
20
19
18
17
16
15
14
1
13
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
OE0
OE1
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9
23 22 21 20 19 18 17 16 15 14
001aae885
4
5
6
7
8
9
10
11
001aae886
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
A0
2
OE0
OE1
1
13
23
Y0
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
A9
11
22
Y1
21
Y2
20
Y3
19
Y4
18
Y5
17
Y6
16
Y7
15
Y8
14
Y9
001aae887
Fig 3.
Logic diagram
74F827_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 29 January 2010
2 of 13
NXP Semiconductors
74F827
10-bit buffer/line driver; non-inverting; 3-state
5. Pinning information
5.1 Pinning
74F827
OE0
A0
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
24 V
CC
23 Y0
22 Y1
21 Y2
20 Y3
19 Y4
18 Y5
17 Y6
16 Y7
15 Y8
14 Y9
13 OE1
001aal243
A8 10
A9 11
GND 12
Fig 4.
Pin configuration
5.2 Pin description
Table 2.
Symbol
OE0
A0 to A9
GND
OE1
Y0 to Y9
V
CC
[1]
Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9, 10, 11
12
13
24
Description
output enable input (active LOW)
data input
ground (0 V)
output enable input (active LOW)
supply voltage
Unit load
HIGH/LOW
1.0/0.033
1.0/0.033
-
1.0/0.033
1200/106.7
-
Load value
[1]
HIGH/LOW
20
µA/20 µA
20
µA/20 µA
-
20
µA/20 µA
24 mA/64 mA
-
23, 22, 21, 20, 19, 18, 17, 16, 15, 14 data output
One FAST Unit Load (UL) is defined as 20
µ
A in HIGH state, 0.6
µ
A in LOW state.
74F827_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 29 January 2010
3 of 13
NXP Semiconductors
74F827
10-bit buffer/line driver; non-inverting; 3-state
6. Functional description
6.1 Function table
Table 3.
Input
OEn
L
L
H
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
Function selection
[1]
Output
An
L
H
X
Yn
L
H
Z
disabled
transparent
Status
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CC
V
I
V
O
I
IK
I
O
T
amb
T
stg
[1]
[2]
Parameter
supply voltage
input voltage
output voltage
input clamping current
output current
ambient temperature
storage temperature
Conditions
[1]
Min
−0.5
−0.5
−0.5
−30
-
[2]
Max
+7.0
+7.0
+7.0
+5
128
70
+150
Unit
V
V
V
mA
mA
°C
°C
output in HIGH-state
V
I
< 0 V
output in LOW-state
in free-air
[1]
0
−65
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°C.
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
Recommended operating conditions
Parameter
supply voltage
HIGH-level input voltage
LOW-level input voltage
input clamping current
HIGH-level output current
LOW-level output current
Conditions
Min
4.5
2.0
-
−18
−24
-
Typ
5.0
-
-
-
-
-
Max
5.5
-
0.8
-
-
64
Unit
V
V
V
mA
mA
mA
74F827_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 29 January 2010
4 of 13
NXP Semiconductors
74F827
10-bit buffer/line driver; non-inverting; 3-state
9. Static characteristics
Table 6.
Static characteristics
Conditions
Min
V
IK
V
OH
input clamping voltage
HIGH-level output
voltage
V
CC
= 4.5 V; I
IK
=
−18
mA
V
CC
= 4.5 V; V
IL
= 0.8 V; V
IH
= 2.0 V
I
OH
=
−15
mA
V
CC
=
±10
%
V
CC
=
±5
%
I
OH
=
−24
mA
V
CC
=
±10
%
V
CC
=
±5
%
V
OL
LOW-level output
voltage
V
CC
= 4.5 V; V
IL
= 0.8 V; V
IH
= 2.0 V
I
OL
= 64 mA
V
CC
=
±10
%
V
CC
=
±5
%
I
I
I
IH
I
IL
I
OZ
input leakage current
LOW-level input current
V
CC
= 0 V; V
I
= 7.0 V
V
CC
= 5.5 V; V
I
= 0.5 V
V
O
= 2.7 V
V
O
= 0.5 V
I
O
I
CC
output current
supply current
V
CC
= 5.5 V
V
CC
= 5.5 V; V
I
= GND or V
CC
outputs HIGH-state
outputs LOW-state
outputs OFF-state
[1]
[2]
All typical values are measured at V
CC
= 5 V.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[2]
Symbol Parameter
25
°C
Typ
[1]
−0.73
Max
-
−1.2
0
°C
to 70
°C
Unit
Min
−1.2
Max
-
V
-
-
-
-
-
3.3
-
-
-
-
-
-
2.4
2.4
2.0
2.0
-
-
-
-
V
V
V
V
-
-
-
-
-
-
-
-
-
-
-
-
0.42
-
-
-
-
-
-
50
70
60
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
−100
-
-
-
0.55
0.55
100
20
−20
50
−50
V
V
µA
µA
µA
µA
µA
HIGH-level input current V
CC
= 5.5 V; V
I
= 2.7 V
OFF-state output current V
CC
= 5.5 V
−225
mA
70
100
90
mA
mA
mA
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; for test circuit, see
Figure 7.
Symbol Parameter
Conditions
25
°C;
V
CC
= 5.0 V
Min
t
PLH
LOW to HIGH
propagation delay
An to Yn; see
Figure 5
C
L
= 50 pF
C
L
= 300 pF, 1 output switching
C
L
= 300 pF, 10 outputs switching
2.0
-
-
5.5
9.5
12.0
8.5
13.0
16.0
2.0
-
-
9.0
14.0
17.0
ns
ns
ns
Typ
Max
0
°C
to 70
°C;
Unit
V
CC
= 5.0 V
±
0.5 V
Min
Max
74F827_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 29 January 2010
5 of 13
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