CAT1022YI25 datasheet, PDF - EEWORLD Datasheet

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CAT1022YI25: DescriptionMonitoring circuit 2K bit 2.5V ind temp; CategoryPower/power management The power supply circuit; File Size197KB，21 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn; Environmental Compliance

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CAT1022YI25 Overview

Monitoring circuit 2K bit 2.5V ind temp

CAT1022YI25 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	ON Semiconductor
Parts packaging code	TSSOP
package instruction	HALOGEN FREE AND ROHS COMPLIANT, MO-153, TSSOP-8
Contacts	8
Reach Compliance Code	unknow
ECCN code	EAR99
Adjustable threshold	NO
Analog Integrated Circuits - Other Types	POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 code	R-PDSO-G8
JESD-609 code	e3
length	4.4 mm
Humidity sensitivity level	1
Number of channels	1
Number of functions	1
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP8,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	3.3/5 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply current (Isup)	3 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	3 mm

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CAT1021, CAT1022, CAT1023

Supervisory Circuits with I

C Serial 2k-bit CMOS

EEPROM, Manual Reset and Watchdog Timer

FEATURES

Precision Power Supply Voltage Monitor

— 5 V, 3.3 V and 3 V systems

— Five threshold voltage options

Watchdog Timer

Active High or Low Reset

— Valid reset guaranteed at V

= 1 V

400 kHz I

C Bus

2.7 V to 5.5 V Operation

Low power CMOS technology

16-Byte Page Write Buffer

Built-in inadvertent write protection

— WP pin (CAT1021)

1,000,000 Program/Erase cycles

Manual Reset Input

100 year data retention

Industrial and extended temperature ranges

8-pin DIP, SOIC, TSSOP, MSOP or TDFN

(3 x 3 mm foot-print) packages

— TDFN max height is 0.8 mm

DESCRIPTION

The CAT1021, CAT1022 and CAT1023 are complete

memory and supervisory solutions for microcontroller-

based systems. A 2k-bit serial EEPROM memory and a

system power supervisor with brown-out protection are

integrated together in low power CMOS technology.

Memory interface is via a 400 kHz I

C bus.

The CAT1021 and CAT1023 provide a precision V

sense circuit and two open drain outputs: one (RESET)

¯¯¯¯¯¯

drives high and the other (RESET) drives low whenever

falls below the reset threshold voltage. The

¯¯¯¯¯¯

CAT1022 has only a RESET output and does not have

a Write Protect input. The CAT1021 also has a Write

Protect input (WP). Write operations are disabled if WP

is connected to a logic high.

All supervisors have a 1.6 second watchdog timer circuit

that resets a system to a known state if software or a

hardware glitch halts or “hangs” the system. For the

CAT1021 and CAT1022, the watchdog timer monitors

the SDA signal. The CAT1023 has a separate watchdog

timer interrupt input pin, WDI.

The power supply monitor and reset circuit protect

memory and system controllers during power up/down

and against brownout conditions. Five reset threshold

voltages support 5 V, 3.3 V and 3 V systems. If power

supply voltages are out of tolerance reset signals

become active, preventing the system microcontroller,

ASIC or peripherals from operating. Reset signals

become inactive typically 200 ms after the supply voltage

exceeds the reset threshold level. With both active high

and low reset signals, interface to microcontrollers and

¯¯¯¯¯¯

other ICs is simple. In addition, the RESET pin or a

separate input, ¯¯¯, can be used as an input for push-

button manual reset capability.

The on-chip, 2k-bit EEPROM memory features a 16-byte

page. In addition, hardware data protection is provided

by a V

sense circuit that prevents writes to memory

whenever V

falls below the reset threshold or until V

reaches the reset threshold during power up.

Available packages include an 8-pin DIP and surface

mount 8-pin SO, 8-pin TSSOP, 8-pin TDFN and 8-pin

MSOP packages. The TDFN package thickness is

0.8mm maximum. TDFN footprint options are 3 x 3mm.

For Ordering Information details, see page 19.

Characteristics subject to change without notice

Doc. No. MD-3009 Rev. P

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